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ethernet_tri_mode_rtl.tar
- 以太网控制器verilog，含有mac,mii接口
mii to rmii代码
- mii 接口转rmii接口的verilog代码
ethernet_controller_Verilog
- 以太网控制器源码，verilog语言,包含MAC、MII接口-Ethernet controller ,include MAC and MII interfaces ,by verilog
smii_latest.tar
- SMII接口的mac控制器，通过测试。使用verilog语言！-The Serial Media Independent Interface, SMMI, is a low pin count version of the MII normally used between ethernet MAC and PHY. The Serial Media Independent Interface (SMII) is designed to satisfy the following r
VHDL_MII_MAC
- 百兆以太网接口，verilog HDL,希望能对你有帮助。-verilog HDL， MII，ethernet，hope helpful to you。
MII
- 以太网MII芯片配置接口的VHDL设计，配置PHY芯片的模块设计-Ethernet MII chip configuration interface VHDL design, configuration PHY chip module design
eth
- 用数字逻辑语言描述以太网，百兆以太网MAC和MII的verilog源码-With digital logic language to describe Ethernet
以太网控制器Verilog源码(含有MAC,MII接口)
- 以太网控制器Verilog源码(含有MAC,MII接口)(Ethernet controller Verilog source code (including MAC, MII interface))
以太网控制器Verilog源码(含有MAC,MII接口)
- 使用verilog语言完成MAC层代码的编写(Using the Verilog language to write the code of the MAC layer)