搜索资源列表
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1602LCD液晶显示控制的verilog源码-1602LCD LCD verilog source code control
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this a simple Verilog source code for 4X1 mux.-this is a simple Verilog source code for 4X1 mux.
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stopwatch : verilog source code
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SPARTAN 3E 开发板驱动程序 Verilog源码 对于数字电路设计是很好的参考资料-SPARTAN 3E development board driver for digital circuit design, Verilog source code is a good reference
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伪随机二进制序列发生器的Verilog源码,带测试文件,并在FPGA开发板上成功验证-Pseudo-random binary sequence generator Verilog source code, with a test file, and successfully verified in FPGA development board
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这是很有用的VHDL和VERILOG 的源代码,我是买过的来的,觉得太有用了,特此共享,对于学习OFDM的人来说,是太难得了!-This is useful VHDL and VERILOG source code, I bought in the past, I feel so useful, and hereby share, for the people who study and OFDM, is too hard won!
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verilog source code and test bench of Adder Kogge Stone 32-Bit
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verilog source code for transpose buffer 8x8 matrics
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verilog source code for RGB YCrCb color converter
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这是关于VERILOG HDL的有限状态机的源码,大家参考参考,应该有好处的。-This is about VERILOG HDL source code for finite state machines, we refer to the reference, it should be good.
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Multiport SRAM verilog source code
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VERILOG source code of a H.264 baseline decoder.
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CSC RGB2YUV Verilog source code
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基于verilog的计时器源代码,可以通过编译-Verilog source code based on the timer, you can compile
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用verilog写的32位CPU源码,通过汇编语言可以实现加减乘除左移右移等运算。并且通过Lookahead算法提高了运算效率,大大节省了运算时间。通过ASC流程可以模拟出其内部电路结构。代码,过程文件,readme在文件夹中-Written by 32-bit CPU verilog source code, assembly language can be achieved through the addition, subtraction and other operations righ
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基于XILINX的XST3开发板的视频采集源码,代码详细,已经测试通过-XILINX' s XST3 development board based on the video capture source code in detail, has been tested
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ADC ADS62P49
It is TI adc verilog source code for
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基于RISC结构的8位微处理器的verilog源代码,很好的东西。-8-bit RISC-based microprocessor architecture verilog source code, a good thing.
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Source code for ddr2 dram controller for BEEE
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通用异步通讯UART的工程文档,ISE打开工程,里面有VERILOG的源代码,可以编译通过-UART Universal Asynchronous communication engineering documents, ISE open the project, which has VERILOG source code can be compiled
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