搜索资源列表
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0下载：
PCI接口的Verilog源代码-PCI connection Verilog source code
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PLD与8051接口的参考设计 Xilinx提供的verilog源代码-PLD 8051 interface with the Xilinx Reference Design for the Verilog source code
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3下载：
标准SDR SDRAM控制器参考设计，Lattice提供的verilog源代码-standard SDR SDRAM controller reference design, the Lattice Verilog source code
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一个嵌入式RISC CPU 的Verilog 设计源码，可综合。内含详细的设计文挡。-an embedded RISC CPU design Verilog source code can be integrated. Detailed design containing the text block.
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pic cpu source code. it is writed in the verilog source code. it can work on the 40Mhz high speed.
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基于FPGA的CAN总线控制器，VERILOGHDL源代码，Q2仿真实现。可用。-FPGA-based CAN Bus Controller, VERILOGHDL source code, Q2 Simulation. Available.
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本文件是pci的verilog源代码程序-pci the Verilog source code procedures
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还是一个verilog原代码,可以在modelsim下运行,强烈推荐下载-or a Verilog source code can be run in modelsim strongly recommend downloading
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奇偶校验码的VERILOG源码，为MODELSIM下的一个工程。有测试文件。-parity VERILOG source code for MODELSIM of a project. A test document.
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8051的源代码-8051 source code
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MODELSIM 环境下的Verilog 源代码，实现全加器功能-MODELSIM environment Verilog source code, the entire increase functionality
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一个可综合的串并转换接口verilog源代码-a comprehensive series of conversion and interface Verilog source code
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提供了《自己动手写CPU》本书每一章涉及的OpenMIPS源代码、测试程序。(It provides the OpenMIPS source code and test program in each chapter, which is written in the book "do it yourself CPU".)
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此上传的是在FPGA的spartan 3e系列开发板上面实现精准到 时、分、秒、百分秒的数字跑表的Verilog源代码。(This is uploaded on the FPGA Spartan 3E series development board to achieve precise time, minute, seconds, 100 seconds of digital stopwatch Verilog source code.)
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此上传的是在FPGA的spartan 3e系列开发板上面实现黑白块VGA显示功能的基于Verilog的源代码。(This upload is based on FPGA's Spartan 3E series development board to achieve black and white VGA display function based on Verilog source code.)
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本设计是verilog设计的俄罗斯方块，含有所有的源代码。(This design is Verilog designed Tetris, which contains all the source code.)
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8下载：
以太网协议 TCP/IP/DHCP协议verilog实现(Ethernet IP/TCP/DHCP verilog source code)
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2下载：
FPGA模拟I2C协议读写24C02 verilog 源码(FPGA analog I2C read and write 24C02, verilog source code)
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Verilog实现的RS232发送和接收程序，有完成的verilog代码，testbench等。(UART send and receive verilog code, including verilog source code, testbench etc.)
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spi串行输出ADC——AD7989的verilog源代码。(Spi serial output ADC - AD7989 Verilog source code.)
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