搜索资源列表
counter
- 适用于FPGA Xilinx开发板的Counter程序，计数从0到9999，在板上用4位7段数码管显示，可实现双向计数。-Applicable to FPGA Xilinx development board of the Counter procedures, counting from 0 to 9999, in the board with four 7 digital display, enabling two-way counts.
multiplexer
- multiplexer xilinx FPGA
Xilinx_ISE_9.2i_Software_Manuals
- Xilinx公司的FPGA的专用编程软件ISE的软件详细使用手册-Xilinx' s FPGA-programming software-specific details of the use of ISE software manuals
clock_generator_0_wrapper
- 赛灵思FPGA开发板上时钟源的VHDL源代码，可作为硬件设计参考资料！-Xilinx FPGA development board clock source of the VHDL source code, hardware design can be used as reference!
debug_module_wrapper
- 赛灵思FPGA开发板上调试模块的VHDL源代码，可作为硬件设计参考资料！-Xilinx FPGA development board debug module' s VHDL source code, hardware design can be used as reference!
bram_block_0_wrapper
- 赛灵思FPGA开发板上BRAM模块VHDL源代码，可作为硬件设计参考资料！-Xilinx FPGA development board BRAM module VHDL source code, hardware design can be used as reference!
xapp058
- xilinx Spartan-3E FPGA的MCU配置源代码-xilinx Spartan-3E FPGA to configure the source code of the MCU
core_licenses_full
- 这个是XILINX公司FPGA的aurora，IP授权！！完全好用!-This is the XILINX' s FPGA-aurora, IP licensing! ! Totally easy to use!
Vme_Interface
- 这是本人设计的一个关于VME总线接口的FGPA程序，FPGA一边连接ARM LPC2294，一边连接VME总线，FPGA采用的XILINX公司的SPARTANII系列，程序包包含完整的工程文件-This is my design of a VME bus interface on the FGPA procedures, FPGA side of the connection ARM LPC2294, while connecting VME bus, FPGA using the XILINX
TechXclusives-GetSmartAboutReset
- Xilinx FPGA reset usage
TechXclusives-GetYourPrioritiesRight
- Xilinx FPGA make 50 smaller-Xilinx FPGA make 50 smaller
TechXclusives-MovingDataAcrossAsynchronousClockBo
- Xilinx FPGA moving data across asynchronous clock boundaries
FPGA1.2
- Xilinx的FPGA开发DEMO例程，功能相对来说比较全面，适合新手参考。-Xilinx FPGA development DEMO routines, function relatively comprehensive reference suitable for novice.
ds28ea_src
- xilinx fpga 实现温度传感器ds28ea00的控制接口-xilinx fpga implementation of the control interface temperature sensor ds28ea00
XilinxFPGA
- 在Xilinx的FPGA开发板上运行第一个FPGA程序-In the Xilinx FPGA development board to run the first program a FPGA
SlaveSerialFPGA
- salve serial 配置XILINX FPGA源代码-slave serial config xilinx fpga
s3ask_ddr2
- DDR2-400样例源代码，用于Xilinx Spartan 3A/3AN Starter Kit-DDR2-400 sample source code for Xilinx Spartan 3A/3AN Starter Kit
JTAG
- 详细介绍FPGA的JTAG原理和应用,主要设计Xilinx的FPGA的JTAG设计和下载方式-XilinxFPGAJTAG
FPGAyanlitu
- 烧录升级文件需要的FPGA下载线原理图 xilinx官方的下载线原理图，里面用了两个74hc125。并口，线路很简单-Burning files needed to upgrade FPGA download cable schematic diagram official xilinx download cable schematics, which used two 74hc125. Parallel, the line is very simple
FILTRO_DIGITAL_EN_VHDL
- DIGITAL FILTER IN VHDL FOR XILINX FPGA SPARTAN 3