搜索资源列表
tutorial
- 计数器 平台：Xilinx ise 10.1 说明：和ise10.1快速帮助手册配套的源码，适用于初学者。-counter platform: Xilinx ise 10.1 comment: supplement to ise quick start tutorial 10.1, suitable for freshman to fpga and ise software.
my_vix0903
- 基于Xilinx FPGA 的Spartan3 实现的VXI接口-FPGA VXI interface
sanfenpin
- verilog 三分频 分频器是FPGA设计中使用频率非常高的基本设计之一，尽管在目前大部分设计中，广泛使用芯片厂家集成的锁相环资源，如altera 的PLL，Xilinx的DLL.来进行时钟的分频，倍频以及相移。-verilog-third of the frequency divider is a FPGA design, very high frequency of use, one of the basic design, although most of the designs in
traffic_light
- this project is traffic lights on fpga. ı used xilinx ise and simulated modelsim. [used spartan 3e development kit]. -this project is traffic lights on fpga. ı used xilinx ise and simulated modelsim. [used spartan 3e development kit].
daq_arm_fifo
- 实现FPGA与ARM的通信，数据、地址总线方式-FPGA（xilinx） and the ARM（三星2440） implementation of communications, data and address bus mode
ad_converter
- 该代码可实现FPGA对AD转换器的控制，使用的是状态机-THE CODE CAN REALIZE THAT XILINX FPGA CONTROL AD CONVERTER BY USING STATEMENT MECHIN3
ddr_sdr_V1_1
- DDR控制器 - 用XILINX Virtex II FPGA实现 - 使用DDR MT46V16M16作为仿真模型 - 通用化-DR SDRAM Controller Core - has been designed for use in XILINX Virtex II FPGAs - works with DDR SDRAM Device MT46V16M16 without changes - may be easily adapted
basedonFPGALCD
- 基于FPGA的LCD接口程序代码，可以在xilinx或altera开发板运行-FPGA-based LCD interface program code, you can run the xilinx or altera Development Board
xilinx_timing_constains_training
- 很详细的讲解了关于xilinx时序约束的很多问题。-describe timing constains in xilinx FPGA design
FPGA_VGA_displaydoctum
- 使用 FPGA 控制 VGA 显示 相关知识介绍：包括 显示器术语 显示卡术语 VGA 时序设计 色彩原理 显示 源代码 相关测试图片-The use of FPGA control VGA display relevant knowledge, Introduction: terminology, including display graphics card design color theory terminology VGA timing related t
fpga_memory_rev_1_0
- Various memories for Xilinx and Altera FPGA devices. Single-port and Dual-port versions with various numbers of read and write ports. Bundle also includes read-first and write-first varieties with sync and async clocks. All memory compo
FPGA_Board_Reference_Guide_1.0
- annother FPGA ucLinux Board reference design, using Xilinx s Spartan3 FPGA (XC3S400)
eetop[1].cn_ise_book
- Xilinx ISE 9.x fpga&cpld设计指南 光盘附带内容
spartan_labview_2009_driver
- The LabVIEW FPGA for SPARTAN 3E XUP driver was developed to enable educators to use LabVIEW FPGA to teach digital and embedded design concepts. This driver is for educational use and cannot be used on custom FPGA hardware.
Lab_4_PicoBlaze
- Integrating a picoblaze processor in LabVIEW FPGA by use of CLIP node. Create LabVIEW FPGA Project for Xilinx Spartan 3E starter board. use pBlazIDE to program a psm file that will run on the picoblaze softcore processor.
liushuideng
- 基于XILINX公司FPGA的流水灯代码，采用硬件描述语言VHDL-XILINX' s FPGA-based water lamp code, using hardware descr iption language VHDL
LCD
- 基于XILINX公司的FPGA的液晶显示驱动程序代码-XILINX' s FPGA-based LCD driver code
jj
- 本题设计一个数字存储示波器，以Xilinx公司20万门FPGA芯片为核心，辅以必要的外围电路（包括信号调理、采样保持、内部触发、A/D转换、D/A转换和I/O模块），利用VHDL语言编程，实现了任意波形的单次触发、连续触发和存储回放功能，并按要求进行了垂直灵敏度和扫描速度的挡位设置。信号采集时，将外部输入信号经信号调理模块调节到A/D电路输入范围，经A/D转换后送入FPGA内部的双口RAM进行高速缓存，并将结果通过D/A转换送给通用示波器进行显示，完成了对中、低频信号的实时采样和高频信号的等效采
usb_fpga_1_2_latest.tar
- USB2.0的FPGA内核，使其可以通过FPGA控制CY公司出品的CY7C68013USB微控制器，对USB设备进行读写操作。-• Xilinx Spartan-3 XC3S400 FPGA • High-Speed (480 MBit/s) USB interface via Mini-USB connector (B-type) • Cypress CY7C68013A/14A EZ-USB-Microcontroller • 60 G
HDLC_VHDL
- 用VHDL实现从以太网到并行数据以及从并行数据到以太网的HDLC成帧解帧.附详细代码说明,方便阅读.可方面移植到Altera及Xilinx等厂家芯片,是做基于FPGA的以太网设计的好资料-Achieved using VHDL and parallel data from the Ethernet to parallel data from the HDLC framing solution to Ethernet frames. Attached detailed code instructi