搜索资源列表
DE2_NET
- altera cyclone 2 net example
cyclone-handbook
- altera 的cyclone fpga手册,比较全面介绍了这款fpga芯片-the cyclone handbook of altera s fpga,specifically introduced this fpga chip
weitb
- 在数字通信中,通常直接从接收到的数字信号中提取位同步信号,这种直接法按其提取同步信号的方式,大致可分为滤波法和锁相法。锁相法是指利用锁相环来提取位同步信号的方法,本设计方案就是基于锁相环的位同步提取方法,能够比较快速地提取位同步时钟,并且设计简单,方便修改参数。采用Quartus II设计软件对系统进行了仿真试验,并用Altera的Cyclone II系列FPGA芯片Ep2c5予以实现。-In digital communication, usually from receiving direc
MYCRC
- 由于altera公司的CRC生成和校验模块不支持本系统使用的Cyclone IV E系列FPGA,因此本文独立设计了CRC模块。该模块的接口与altera公司的CRC模块接口基本一致,能够对16位输入的数据流进行CRC校验码生成和校验。本文采用CRC-CCITT生成项,其表达式为:X16+X12+X5+X0。本模块需要startp信号及endp信号指示数据传输的起始及结束。本模块采用状态机设计,对于数据头和数据尾分别由不同的状态来处理。在本模块中,使用了for循环,这会消耗较多的FPGA资源,但
EP3C120-LCD
- 应用verilog语言编写的在ALTERA-CYCLONE III 开发板1602上面显示字符-Application verilog language characters shown above in 1602
procesador_2
- Processor in VHDL creating by us for Altera Cyclone II FPGA
DDR_CTRL
- DDR Verilog 控制器,quartus 10.1工程。适用Altera Cyclone® III starter board-DDR control quatrus 10.1,Altera Cyclone® III starter board
mc8051_cyclone_nios
- mc8051 v1.4 oregano VHDL core for the Altera Cyclone Nios evaluation board.
spi
- Altera Cyclone SPI-slave vhdl module
keyboard4_4-and-seg7
- 4*4键盘扫描程序,并将键值利用七段数码管显示出来。芯片为Altera Cyclone EP1C6Q240C8。-It s very simple,for rookies.
usb_test
- altera cyclone 2c35开发板,测试usb通用串行总线,verilog编写的-altera cyclone 2c35 development board test usb Universal Serial Bus, verilog prepared
my_test_rw_pack9
- 基于Verilog HDL的SDRAM控制器。 实验条件: 工具:Quartus II 6.0 ,SignalTap II FPGA:Altera Cyclone EP1C12Q240C8N SDRAM:HY57V283220T-6-SDRAM controller based on Verilog HDL. Experimental conditions: Tools: Quartus II 6.0, SignalTap II FPGA: Altera Cyclon
EP3C10_Verilog
- ALTERA Cyclone ΙΙΙ EP3C10 开发板测试代码-ALTERA Cyclone ΙΙΙ EP3C10 development board test code
FA161-SCH
- 联华众科FPGA开发板FA161核心器件为 Altera Cyclone系列FPGA EP1C6,FA161板载有SDRAM,SRAM,FLASH方便制作各种应用,开发板所带资料中包括了上位机与开发板USB通信,上位机与开发板以太网通信,上位机与开发板串口通信例程。FA161板载有USB 1.1,USB 2.0(CY7C68013A)接口,以太网接口(RTL8019AS)。FA161上可以进行HDL程序开发,可以进行nios ii程序开发,可以结合MATLAB制作DSP Builder应用。FA
DE2_TVdecoder
- 基于altera cyclone ii的TV译码例程-demonstrations about TV decoder based on altera cyclone ii
xinhaoyuan
- DDS产生多种波形信号发生器,包括正弦波,三角波,方波,锯齿波。运行于Altera Cyclone FPGA平台。-DDS signal generator generates a variety of waveforms including sine, triangle wave, square wave, sawtooth wave. Running on Altera Cyclone FPGA platform.
2fsk_0516
- 运行于Altera Cyclone FPGA平台,基于DDS原理的FSK信号发生器,可产生FSK信号-Running on Altera Cyclone FPGA platform, based on the principle of DDS FSK signal generator for FSK signal
MOTO3--bujin
- 运行于Altera Cyclone FPGA平台,顶层为原理图方式,模块由VHDL编写的步进电机驱动程序。-Running on Altera Cyclone FPGA platform, the top of the schematic way, module consists of VHDL stepper motor driver.
MOTO3--zhiliu
- 运行于Altera Cyclone FPGA平台,顶层为原理图方式,模块由VHDL编写的直流电机驱动程序。-Running on Altera Cyclone FPGA platform, the top of the schematic way, the module VHDL prepared by the DC motor driver.
cmi
- 运行于Altera Cyclone FPGA平台,由VHDL编写的NRZ到CMI编码和CMI到NRZ解码程序。-Running on Altera Cyclone FPGA platform, VHDL prepared NRZ to CMI CMI to NRZ encoding and decoding procedures.