搜索资源列表
fft
- This example describes a 32K-point fast Fourier transform (FFT) using the Altera FFT IP MegaCore.
FFT_verilog
- verilog实现的FFT变换，经硬件测试其功能与Altera的FFT IP核相近-verilog implementation FFT transform, through hardware, test its functionality with Altera' s FFT IP core similar to
FFTVHDl
- 基于FPGA的fft实现 摘要：本系统基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核，代替传统DSP芯片或高性能单片机，实现了基于FFT的音频信号分析。-FPGA-based realization of the fft Abstract: This system is based on Altera Cyclone II family of embedded high-performance FPGA embedded IP core
fftsoft
- 应用altera的最新fft核做的使用范例，fft核遵循avalon总线。对于想使用altera的IP core的朋友有帮助-Application of nuclear altera do the latest example of the use fft, fft nuclear follow avalon bus. Who want to use the IP core of friends altera help
fft_32K
- This example describes a 32K-point fast Fourier transform using the Altera FFT IP MegaCore. 描述了一个32K的点快速傅立叶变换（FFT） 。
fft_ug
- altera的FFT IP核的用户手册，介绍了如何使用ALTERA IP核生成FFT核，如何设置参数并讲述了如何仿真，适用于通信方面的FPGA设计工程师，学生。-altera' s FFT IP core user manual describes how to use the ALTERA IP core generated FFT core, how to set parameters and describes how to simulate, for communications, FP
fft_ip_core
- FFT的FPGA硬件实现，利用ALTERA公司的IP核来实现此功能,包含工程文件和相关例程-FFT hardware implementation, FPGA implementation of FFT function, using ALTERA s IP core to achieve this functionality
FFF-IP-Core
- Altera FFT兆核函数的使用说明，希望对大家有所帮助。-The use of Altera FFT trillion nuclear function, we want to help.
FFT_test
- 在FPGA中实现快速傅立叶变换，调用ALTERA的IP核模块-FFT demo in FPGA
fft
- altera公司fft ip核的运用。语言是verilog.-Altera company s fft ip. Language verilog.
fft_test
- ALTERA的FFT IP核时序的仿真，verilog语言。采用burst方式，FFT点数2048点-FFT IP core of timing simulation ALTERA, verilog language. Using burst mode, FFT points 2048 points
FFT
- 基于Altera Cyclone II 系列FPGA嵌入高性能的嵌入式IP核(Nios)处理器软核,实现了基于FFT的音频信号分析-Altera Cyclone II FPGA family based embedded high-performance embedded IP core (Nios) soft core processor to achieve a FFT-based audio signal analysis
cf-fft
- 用ip核实现fft。用vhdl编写。altera的fpga-Ip core implementation using fft. Written in vhdl
fft_analyze
- 利用Altera的IP核，实现FFT算法使用信息流模式读写，使用SignalTap II嵌入式逻辑分析仪观察信号，A/D只要是并行的8位芯片都可以。-Achiving FFT by using Altera IP Core,you can observe the signal by the embedded logic analyzer Signal Tap II,as for A/D device, it s suitable for a parllarel 8 bits A/D device