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ahb_system_generator.tar
- An AHB system is made of masters slaves and interconnections. A general approach to include all possible \"muxed\" implementation of multi layered AHB systems and arbitrated AHB ones can be thought as an acyclic graph where every source node is a mas
arbiter
- VHDL源代码共享,资源多多共享,论坛上多多讨论!
AMBA-Bus_Verilog_Model
- 该源码包是2.0版本的AMBA总线的Verilog语言模型，主要包括5个部分：AHB总线仲裁器，AHB-APB总线桥接器，AHB总线上从设备ROM模型，AHB总线上从设备RAM模型，参数定义。-This source code package is the model of V2.0 AMBA bus of ARM company, It mainly includes the following five parts: the AHB arbiter,AHB-APB bridge, AHB_R
on_chip_bus
- 用基于systemcc c++作为建模语言，对芯片的片上总线主设备，从设备，仲裁器，和总线本身进行建模。给出的从设备包括快速存储器，慢速存储器，和通用串口；主设备包括直接型主设备，阻塞型设备，非阻塞型主设备；另外还有总线本身和总线仲裁器。-Based systemcc c++ As a modeling language, on-chip-chip bus masters, from the equipment, arbiter, and bus modeling itself. Given f
pci_arbi_quicklogic
- PCI 仲裁代码/ PCI BUS ARBITER //WRITTEN BY MARIA GEORGE `include "c:\pasic\spde\data\macros.v" module Arbiter (REQ_, reset_, clk_in, frame_, irdy_, GNT_, adbus, cbe) parameter MASTERS = 6 //This code can handle a maximum of six masters.
LIP1732CORE_system_mbus_arbiter
- System Verilog M bus arbiter module
LIP1731CORE_system_gbus_arbiter
- Verilog system G bus arbiter module
arbriter-full
- this code is arbiter verilog design code and with testcases.
AHB
- 基于混合优先权算法的AHB总线仲裁器的设计-Hybrid algorithm based on priority AHB bus arbiter design
Backoff-verilog
- 一个简单的总线轮询仲裁器Verilog代码 -A simple bus polling arbiter Verilog code
arbiter_ip
- Arbiter code for simulation purpose
arbitration
- arbiter code in verilog hdl
ca06
- Direct Memory Access (DMA) lecture notes. It includes DMA design for MC68000 and DMA facilities. Also, it mentions about bus arbiter and bus cycles for DMA.
arb
- verilog round robin arbiter
AHBArbiter
- AMBA ahb总线协议的arbiter模块源代码，verilog编写，适合新手学习使用。-this is a code of AMBA AHB arbiter protocol in verilog
arbiter2
- The logic design of an efficient and fast round robin arbiter in Verilog or any other HDL language relies on the capability to find the next requestor to grant without losing cycles and with minimal logical stages. Using the fastest logic constructs
arb
- arbiter code for dual ported ram
arbiter
- Memory arbiter functions. Allocates bandwidth through the arbiter and sets up arbiter breakpoints.
arbiter
- 仲裁器代码,DDR3 SDRAM控制用所给出，请大家参考，-arbiter for ddr3 sdram
Arbiter-VHDL-based-design
- 1、熟悉VHDL的编程。 2、熟悉七人表决器的工作原理。 3、进一步了解实验系统的硬件结构。 -Arbiter VHDL-based design