搜索资源列表
counter
- 本文介绍了基于FPGA的数字频率计的设计方法，设计采用硬件描述语言Verilog ，在软件开发平台ISE上完成，可以在较高速时钟频率（48MHz）下正常工作。该数字频率计采用测频的方法，能准确的测量频率在10Hz到100MHz之间的信号。-This article describes the FPGA-based digital frequency meter design method using hardware descr iption language Verilog, ISE on t
new
- 这是一个基于fpga的信号发生器，能产生三种不同的波形，经过测试运行稳定-This is an fpga-based signal generator can produce three different waveforms, tested and stable operation
or2a
- 试验用的FPGA与门电路，试验可用，VHDL写的-Experiment with the FPGA and gate, the test can be used
DDS
- 实现了基于FPGA的DDS信号源设计，能同时两路输出，输出波形包括正弦波、三角波、方波和锯齿波，且其频率和相位均可调，还能计算两路输出信号的相位差。-FPGA-based implementation of the DDS signal source design, two outputs simultaneously, the output waveforms including sine, triangle, square and sawtooth waves, and its freque
pwm
- 基于FPGA实现的脉宽调制技术，可应用LED与电机驱动。-Pulse-width modulation based on FPGA technology can be applied to LED and motor drive.
ftctrl
- 基于FPGA实现的32位计数器，可控制计数位宽。-FPGA-based implementation of the 32-bit counter, can control the counting bits wide.
DDS_Core_HSpeed_ADDA_C5H
- ＦＰＧＡ的按键调试，不知道怎样上传整个的文档，就上传个程序，大家可以借鉴下-FPGA debug keys, do not know how to upload the whole document, you upload a program, we can learn from the next
pong_C5H
- FPGA的经典例程，可以进行移植和借鉴使用-FPGA' s classic routines, can be transplanted and learn to use
sine
- 采用FPGA存储正弦波的256个点，分别输出，可以产生较好的正弦波，如果要产生其他的频率，只需改变分频比即可，即num的值。已经通过实物验证-FPGA-stored sine wave of 256 points, respectively, output, can produce a good sine wave, if you want to generate other frequencies, only Divider ratio can be changed, that value
keyboard
- 用verilog代码编写的交通灯的FPGA工程。可实现南北和东西两条大街的十字路口的交通控制。-Verilog code written with the traffic lights of the FPGA project. Two north-south and east-west can be achieved Street intersection traffic control.
DM1_KEYs_LEDs_C5H
- 在FPGA中的 cycloneII 中实现键盘控制的顶层实体设计以及相关功能设计，经过试验编译成功并可以运行的程序-In FPGA cycloneII keyboard control to achieve top-level physical design and design-related functions, tested and successfully compiled programs can run
led_show
- 在FPGA中实现lcd字符型显示器的控制，并且能实现动态的显示-In the FPGA lcd character display control, and can achieve a dynamic display
DDS-TEST-4
- 用FPGA实现DDS，有正弦，三角，方波，方波可调占空比，频率可调。能做到100K左右。-Using FPGA DDS, a sine, triangle, square, adjustable duty cycle square wave, frequency adjustable. Can do about 100K.
sbqzh_09_improve06
- 利用FPGA开发制作示波器，该程序为FPGA部分程序，配合单片机控制程序可实现简易示波器功能。-Make use of FPGA development scope, the program for the FPGA portion of the program, the program can be realized with the simple single-chip control oscilloscope function.
DDS_8b_zy_02
- 该程序实现FPGA实现DDS功能，配合单片机控制可实现正弦波输出。以及配合外围电路改变DA参考电压，可实现输出电压可调。-FPGA implementation of the program to achieve DDS functions, control can be achieved with sine wave output of the microcontroller. Changes in the external circuit with the DA and the refere
ex14_SDRAM
- 在FPGA的学习中，SDRAM是一个相当重要的一块知识点，在这个程序中，你可以看到SDRAM的相关代码。-Learning in the FPGA, SDRAM is a very important piece of knowledge points in this program, you can see the relevant code of SDRAM.
clkdiv
- 这是一个FPGA任意分频的很经典的VHDL程序，希望能对大家有帮助-This is an arbitrary frequency FPGA VHDL program of classic, I hope you can help
dog12.31.13.2
- FPGA作品 简易计算器 可以实现加减乘除以及后退等功能-Fpga work can achieve a calculator to add, subtract, multiply and back, except for functions
AD9954
- 设计背景:近年来现场可编程门阵列( FPGA) 技术得到了迅速的发展和广泛的应用, 其资源容量、工作频率以及集成度都得到了极大的提高, 使得利用FPGA 实现某些专用数字集成电路得到了大家的关注, 而基于FPGA 实现的直接数字频率合成器即DDS（Direct Digital Synthesizer）则更具其优点, 有着灵活的接口和控制方式、较短的转换时间、较宽的带宽、以及相位连续变化和频率分辨率较高等优点, 其也为设计者在此基础之上实现电路集成提供了另一种方法,同D/ A 转换器和低通滤波器(
FPGA_clock
- 基于FPGA的多功能的数字时钟！能够显示时，分，秒，日期！-FPGA based multi function digital clock! Can display hours, minutes, seconds, date!