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digital-clock
- 该程序是有verilog实现的fpga的交通灯 适用于cycloneII芯片 可供fpga初学者学习verilog语言时参考，不仅可以显示时钟 还能调整时钟分针秒针-The program is a verilog realize fpga of traffic light is applicable to cycloneII chips available for beginners to learn verilog fpga languages as reference, not only
anylist-exam
- 任意模计数器FPGA程序代码设计，可实现模1000以内的任意模，更改参数可提高范围-Any mold counter FPGA code design, model 1000 can be achieved within any mode, change the parameters can increase the range
anymode
- 任意模计数FPGA程序代码设计，可以输入任意模值，并由数码管显示计数，-Count any FPGA code design mode, you can enter any model values by digital display counts,
divise-frequent
- 分频器FPGA代码设计，可将高频分为任意频率的低频-Divider FPGA code design can be divided into any high-frequency low-frequency
BCH_EncDec_Matlab
- bch编解码的完整版，本人已经做过fpga实现，就是按照该程序为原型，绝对可运行-bch decoding the full version, I have done fpga implementation is in accordance with the procedure for the prototype, can certainly run
ram_fpgavhdl
- fpga vhdl实现一个标准双端口ram，可以作为单端口或者双端口用 -fpga vhdl achieve a standard dual-port ram, can be used as a single port or dual port with a
AD9716
- ad9716的FPGA配置，可以对ad9716完成完整的FPGA配置，很好-ad9716 FPGA configuration can be done for ad9716 complete FPGA configuration, good
cfgadda
- adda的FPGA配置，可以对adda完成完整的FPGA配置，很好-adda FPGA configuration, you can adda complete a full FPGA configuration, good
song
- FPGA中实现的音乐播放器,程序简洁,精练,可以举一反三,设计自己的音乐合成器,经过验证.-The FPGA' s music player, the program is simple and concise, you can learn by analogy, design your own music synthesizer, proven.
EDAhelper
- 因而，SDRAM常作为数据缓存应用于高速数据传输系统中。目前，许多嵌入式设备的大容量、高速度存储器都采用SDRAM来实现，而且大多都是用专用芯片完成其控制电路，这不但提高了设计成本，而且使系统的硬件电路变得复杂。随着FPGA在嵌入式系统中的广泛应用，如果我们能够结合具体的需要，利用FPGA来设计自己的SDRAM控制器，这些问题就迎刃而解了-During University I studied computer networks have some knowledge about compute
ACtel-RTC-hdl
- 基于Actel公司的反熔丝FPGA实现，实现了实时时钟功能。能区分闰年、大月、小月，秒、分、时自动增长。-this application provides a count of seconds, minutes, hours, day of the week, day of the month, month, and year. The month-ending date is automatically adjusted for months with less than
code
- 实现FPGA对总线的读写操作，能够直接移植到FPGA上进行实验-The FPGA to read and write operations on the bus, can be directly ported to the FPGA experiment
hahatu
- 让FPGA的输出正确的VGA时序，方面修改和嵌入到你的项目里面，可以查看VGA的时序。-The FPGA to the VGA output of the correct timing, in modified and embedded into your project which you can view the VGA timing.
sram1
- 这个是FPGA最简单控制SRAM的方法之一，可以直接嵌套到你们的代码中，建议先看时序分析-This is the simplest control SRAM FPGA one of the methods can be nested directly to your code, look at the timing analysis proposed
key_debounce
- verilog实现的按键消抖源代码，初学fpga的可以学习下-implementation of key debounce verilog source code, beginners can learn from fpga
jibenmendianlu
- 熟悉使用 ISE 软件进行简单的VHDL 文本方式设计，学习使用USB 电缆或并口下载线 下载逻辑电路到FPGA，并能调试电路使其正常工作。熟悉数字电路集成设计的过程。-Familiar with ISE software to design a simple VHDL text, learning to use a USB cable or parallel port download cable Download logic to the FPGA, and can debug t
bianmaqijimaqi
- 进一步熟悉 ISE 软件的使用，进行简单的VHDL 文本方式设计，学习使用USB 电缆下载逻辑 电路到FPGA，并能调试电路使其正常工作。熟悉数字电路集成设计的过程。-More familiar with the use of ISE software, a simple way to design the VHDL text, learning to use the USB cable to download logic Circuit to the FPGA, and can de
i2c.tar
- I2C verilog IP, can be synthesized and fpga proven.
BALL
- 基于FPGA的弹球游戏，可以实现键盘控制，游戏结束画面-Based on FPGA marble of game, can realize the keyboard control, the game is over the picture
song-play
- 本文作者创新点是基于FPGA完成乐曲演奏电路，在Altera Quartus II 环境下，用VHDL 语言实现电子琴演奏音乐的设计实例，设计者根据VHDL的语法规则，对系统的逻辑行为进行描述，然后通过综合工具进行电路结构的综合、编译、优化，用仿真，可在短时间内设计出高效、稳定、符合设计要求的电路。-This innovation is the author of music to play based on FPGA to complete the circuit, the Altera Qu