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digitaloscilloscope
- This digital oscilloscope takes a MCU and FPGA as the core. We made emphases on the choice of the sampling methods and the implement of equivalent sampling as a result, our design not only has the real-time sampling mode but also can reach the highes
8fifo
- 可综合的 8x8 fifo VHDL 源代码-Can be integrated 8x8 fifo VHDL source code
SDRAMVerilogHDL
- FPGA控制串行AD(AD0804),状态机实现,可以根据该程序实现数字电压计,数字温度计的设计-FPGA serial control AD (AD0804), state machine to achieve, you can program according to the number of voltage, the digital thermometer design
Hardware_Speedup_DSP_FPGA
- 现场可编程门阵列(FPGA)已经不再单纯应用在芯片与系统之间的直接互联层,在软件无线电(SDR)中,FPGA逐渐用做通用运算架构来实现硬件加速单元,在降低成本和功耗的基础上提升性能表现。SDR调制解调器的典型实现包括通用处理器(GPP)、数字信号处理器(DSP)和FPGA。而且,FPGA架构可以结合专用硬件加速单元,用来卸载GPP或DSP。软核微处理器可以结合定制逻辑,扩展其内核,也可以将分立的硬件加速协处理器添加到系统中。此外,还可将通用布线资源放在FPGA中,这些硬件加速单元可以并行运行,进
FPQ
- 基于FPGA的数控分频器,可以吧一个时钟信号分成不同频率的时钟信号。-FPGA-based digital frequency divider, a clock signal can now be divided into different frequency clock signals.
fpga.doc
- this gives detail about FPGA kid you can get fpga kid for learning purpose
1602_jp
- FPGA lcd显示程序,可以扫描键盘输入,并在lcd上显示,-FPGA lcd display program, you can scan the keyboard input and display in lcd,
DP83640
- IEEE 1588 PTP 硬件支持功能的以太网收发器,时钟精确性能表现非凡无论选用何种微控制器、FPGA或ASIC,DP83640的加入都可确保系统设计的高度灵活性,并实现高达8ns的精确度-IEEE 1588 PTP hardware support Ethernet transceivers, clock accurate performance, whether extraordinary selection of the microcontroller, FPGA or ASIC, D
TUT1_BASIC1_7C5TP
- FPGA中嵌入8052内核,功能和直接使用52完全相同,但频率可以达到200M.-8052 embedded FPGA kernel, function and use directly exactly the same, but the frequency of 52 blast-caused can achieve.
stopwatch
- The program is written in verilog to accomplish functions of a stopwatch. It can be implemented in Xilinx FPGA spartan 3 board.
pinlvji
- 考虑到只基于单片机的频率测量计设计主要是以单片机为基础,原理简单,但由于自身精度问题,测量的范围小。而基于FPGA和单片机结合的频率测量设计主要是以单片机作为系统的主控部件,FPGA完成对时序逻辑控制、计数功能,能较好的利用了FPGA的高精度、高速等方面的优势。-Taking into account only single-chip based on the frequency meter is based on single-chip design based on a simple pri
can_parts
- This the CAN bus controller for implementation inside any FPGA-This is the CAN bus controller for implementation inside any FPGA
dds_easy
- 直接频率合成DDS模块的ise工程,可以直接下载,在Spartan3/Spartan3E上验证通过。该DDS模块可以产生双通道的不同频率的正弦波,也可以产生同频的任意相位差的相移波形。本模块累加器位数为32位,可以产生12位相位精度12位量化精度的正弦波。该设计例化一个Block Ram,为节省储存空间仅需要储存1/4周期的数据。根据需要,可以重新修改数据,改变波形。-DDS direct frequency synthesizer module ,ise project, can be dir
ARMFPGA
- 甚于ARM和FPGA的全彩独立视频LED系统 本系统采用ARM+FPGA的架构,充分利用了ARM的超强处理能力和丰富的接口,实现真正的网络远程操作,因此不仅可以作为一般的LED显示屏控制器,更可以将各显示节点组成大型的户外广告传媒网络。而FPGA是一种非常灵活的可编程逻辑器件,可以像软件一样编程来配置,从而可以实时地进行灵活而方便的更改和开发,提高了系统效率-ARM and the FPGA rather than the full-color video LED system indepe
DDS
- 基于Verilog的dds设计,已经经过调试,可直接使用-Dds of Verilog-based design, has been testing can be used directly
lcd_driver
- 用FPGA控制12864液晶输出时钟信息 很好 可以根据自己的需要更改 -12864 LCD control with FPGA clock output information can be very good according to their need to change the
ADC0809_VHDL_QUAARTUSII_PROJECT
- FPGA模块工程、ADC0809状态机控制ADC0809_VHDL_QUAARTUSII_PROJECT可以直接使用!-FPGA module works, ADC0809 control state machine can be used directly ADC0809_VHDL_QUAARTUSII_PROJECT!
yuyincaiji
- 语音采集与回放系统源代码:1.为了使读音数据存储的时间更长,速度更快,选用了256K*16Bit的SRAM;2.为了减少单片机的控制复杂度,使用了FPGA来控制SRAM的读写操作,节约了不少单片机的I/O资源;3.为了以后的高速数据存储,本设计中加入了fifo,其位宽及深度可在程序中自由设置,方便灵活。-Speech acquisition and playback system source code: 1. In order to make pronunciation longer data
costas_carrier_recover
- 基于硬件定点的完整的costas载波恢复环设计,FPGA设计可以用之参考。包括输入QPSK信号,16倍符号率采样,初始频差2.4KHz,以及低通滤波器的设计等待。最重要的是有本人的注释,易于上手。-Hardware-based fixed-point of complete costas carrier recovery loop design, FPGA reference design can be used. Including input QPSK signal, 16 times th
SDcard
- fpga关于SD卡存储的程序,可以做出来的,很好-fpga program stored on the SD card, you can do things, very good