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songer
- 用verilog VHDL书写的可以播放一段梁祝音乐的音乐器-Verilog the VHDL written music can play a Butterfly music device
4_channels_-Responder
- 基于Verilog HDL语言的四路抢答器，仿真过，程序能正常运行-Four Responder based on Verilog HDL language，it has been tested and can normally run.
SPI
- Verilog编写的SPI程序，含英文原文档说明，很全的-The OpenCores simple Serial Peripheral Interface core is an enhanced version of the Serial Peripheral Interface found on Motorola s M68HC11 family of CPUs. The Serial Peripheral Interface is a serial, synchronous comm
Sdram_Control_4Port
- 使用verilog HDL写的sdram(SDR)的控制器源代码，具有很好的可移植性，试验的例子已经通过QuartusII 9.0编译通过，可以运行在cycloneII上-Controller source code using verilog HDL written in the sdram (SDR), has good portability, test examples via the QuartusII 9.0 compiler, you can run in cycloneII
seg7_verilog
- 本程序是基于verilog HDL的数码管程序，需要的可以下载。-This procedure is based on Verilog HDL digital tube procedure, need can be downloaded.
clkdivverilog
- 本程序是基于verilog HDL的时钟分频程序，需要的可以下载。-This procedure is based on Verilog HDL clock frequency procedures, in need can be downloaded.
ADPCM_ENCODE
- 关于ADPCM编码的verilog程序，很不错，通过了验证。有需要的可以下载-About the verilog ADPCM coding program, very good, verified. if you need，you can to download
crc_8
- 基于verilog的并行crc8的校验，已经仿真过，符合设计要求，可以拿去参考-Verilog a parallel crc8 checksum, already simulation, meet the design requirements, you can take reference
frame_cap
- GPON中下行帧捕捉模块的verilog程序，在quartuaII上已经验证过，需要的可以拿去参考下-GPON downstream frame capture verilog program has already been verified in quartua can take to refer to the following
uart_verilog
- 一个VERILOG串口收发的例子，可以收发单字节，适当加小量代码就可实现任意字节的接收。-VERILOG a serial port to receive example, can receive a single byte, appropriate to add a small amount of code can be any byte receive.
calendar
- 这是用Verilog写的万年历，里面包含的日月年各个模块。各个模块用Verilog写的，最后用原理图把各个模块组装成最终的系统。每个模块经过仿真没有问题，整个工程在板子上经过试验，能够完成万年历的功能。-This is the calendar write with Verilog, contains the sun and the moon years each module. Each module in Verilog written, finally the principle diag
PS2_keyboard_driver
- verilog写的键盘按键扫描接口，并在7段数码管上显示断码和通码，在LED流水灯上实现滚动显示。想学习PS2键盘扫描这块的童鞋可以下载看看，代码写的还行。-verilog to write a keyboard key scan interface displayed on the 7-segment digital tube broken code and pass code, scrolling display on the LED light water. Want to learn a
verilogcalculator
- 简易的计算器，可实现加减乘除运算，采用verilog编写-Simple calculator, addition, subtraction operation can be realized using verilog prepared
Frequency-tester
- 数字频率计，能自动测试输入方波脉冲的频率，通过LCD1602显示，是用Verilog HDL写的-Digital frequency measurement，Can automatic testing input square wave pulse frequency, through the LCD1602 shows, it is to use Verilog HDL write
syn_detc
- Verilog语言的同步帧检测模块，适用于pcm通信系统，本模块可检测的同步帧为100110-The synchronization frame detection module implemented use Verilog language,for pcm communication system, the module can detect synchronization frame for 10,011,011
Channel_Equalizer
- 使用Verilog编写的信道均衡器，可以有效解决抗多径问题，ISE12.2下编译通过-Written in Verilog channel equalizer can be an effective solution to anti-multipath, ISE12.2 compiled by
IFFT11111
- 使用Verilog编写的IFFT，ISE12.2下编译通过，学习IFFT核的同学可以参考-Use of the IFFT in Verilog compiler, ISE12.2 under study IFFT core students can refer to
Phase1111_Tracking
- 使用Verilog编写的相位跟踪器，可以有效解决锁相环中的相位跟踪问题，ISE12.2下编译通过-Written in Verilog phase tracker can effectively resolve the PLL phase tracking, ISE12.2 compiled by
FPGA_Equalizer
- 使用Verilog编写的信道均衡器，可以有效解决抗多径问题，ISE12.2下编译通过-Written in Verilog channel equalizer can be an effective solution to anti-multipath, ISE12.2 compiled by
vga_dis
- verilog语言实现VGA接口显示，可以在显示器上显示几种图片，可以直接在quartus2上运行-verilog language display, VGA interface can display several pictures on the monitor, you can run directly in quartus2