搜索资源列表
sopc
- altera推出的基于它们fpga和cpld的构建嵌入式系统的新技术sopc的介绍。其集成在quartus II中-ALTERA due to launch them and they simply cpld Construction of the new Embedded System Technology sopc briefing. Its integrated into the Quartus II
MC8051 IP Core
- 8051的IP软核，使用硬件描述语言编写，可以下载到FPGA/CPLD中作为片上系统的处理器-8051 IP soft-core, the use of hardware descr iption language can be downloaded to the FPGA / CPLD as a system-on-chip processor
100Examples
- 有关于VHDL举例,FPGA/CPLD的运用方面的例子-for example VHDL, FPGA / CPLD to the use of the example
n_dc_motor
- vhdl实现的直流电机控制器 通用程序 对不同fpga/cpld，可能需要修改部分源代码。-VHDL achieved DC Motor Controller General of different procedures they simply / cpld. may need to amend some source code.
digitalinterfaceuart
- 文件说明了在fpga/cpld中怎样实现数据接口及其实例了urat-note of the document they simply / cpld How Data Interface and the examples of urat
Altera_uart_VHDL
- FPGA/CPLD应用,uart通讯VHDL原码.-FPGA / CPLD applications, UART communications VHDL source.
Altera_uart_Verilog
- FPGA/CPLD应用,uart的Verilog HDL原码-FPGA / CPLD applications, UART Verilog HDL source
beipin_quartII
- 在FPGA或CPLD上实现的一中非常实用的倍频电路，只要输入频率高，精度就很高-the CPLD or FPGA to achieve a very practical frequency circuit, as long as the input frequency, on the high precision
Altare_beginner
- Altare公司训练新人的练习题下载.rar FPGA/CPLD-Altare company's new training exercises download. Rar FPGA / CPLD
fpga_cpld
- 一份fpga/cpld的入门教程，对初学者很有帮助。-a fpga / cpld introductory tutorial for beginners helpful.
VerilogHDL88
- veriloghdl语言工具书，适合初次了解cpld和fpga工程师学习使用-veriloghdl language tool, suitable for initial understanding of fpga and cpld engineers learning
vhdlcodes
- FPGA/CPLD集成开发环境ISE的使用详解 示例代码1-FPGA / CPLD Integrated Development Environment ISE Comments on the use of a code sample
vhdlcodes2
- FPGA/CPLD集成开发环境ISE使用详解实例－2-FPGA / CPLD integrated development environment IDE ISE examples -2
vhdlcodes3
- FPGA/CPLD集成开发环境ISE使用详解实例－3-FPGA / CPLD integrated development environment IDE ISE example -3
vhdlcodes4
- FPGA/CPLD集成开发环境ISE使用详解实例－4-FPGA / CPLD integrated development environment IDE ISE example -4
vhdlcodes5
- FPGA/CPLD集成开发环境ISE使用详解实例－5-FPGA / CPLD integrated development environment IDE ISE example -5
vhdlcdes6
- FPGA/CPLD集成开发环境ISE使用详解实例－6-FPGA / CPLD integrated development environment IDE ISE example -6
vhdlcodes7
- FPGA/CPLD集成开发环境ise的使用详解 示例代码7-FPGA / CPLD integrated development environment IDE ise the sample code 7
vhdlcodes8
- FPGA/CPLD集成开发环境ise的使用详解 示例代码8-FPGA / CPLD integrated development environment IDE ise the sample code 8
ADC0804
- 控制ADC0804的verilog 代码，cpld/fpga都可以使用，用数码管显示ADC采集的二进制数据。(Control ADC0804 verilog code, cpld / fpga can be used to display the ADC digital tube with the binary data collected.)