搜索资源列表
cpu_1
- mips单周期cpu设计,实现MIPS中的11条指令,在设计的cpu中运行快速排序程序进行验证。-mips one cycle cpu design,run quick sort promgram for test.
8bitcpu_microprogrammed_vhdl
- 八位微程序结构的cpu设计 。 此为课堂设计,欢迎大家参考。 本人联系方式:justin_dengcn@126.com-8 cpu micro-structure of the design process. This is a lesson. please Contact: justin_dengcn@126.com
CPUsourcecode
- 本设计实现了一个具有标准的32位5级流水线架构的MIPS指令兼容CPU系统。具备常用的五十余条指令,解决了大部分数据相关,结构相关,乘除法的流水化处理等问题,并实现了可屏蔽的中断网络。-This design implements a standard 32-bit 5-stage pipeline architecture of MIPS instruction compatible CPU system. Instructions with more than 50 commonly use
PipelineCPU
- Quartus II 7.2环境中,采用硬件描述语言VHDL独立完成了基于MIPS指令集的32位RISC处理器的逻辑设计-quartusII mips pipeline 32bit cpu design
dcv
- 一种实用的单片机双CPU设计方案及其应用-A practical single chip dual CPU design and its application
8bitRISCCPU
- 该文件是8位CPU设计硬件描述语言,对于初学者来说可以作为参考-The file is 8-bit CPU design hardware descr iption language can be used as reference for beginners
NonPipelined_Design
- 用VHDL实现的非流水线CPU设计,可以稍加改动变成流水线设计-VHDL implementation with non-pipelined CPU design
PipelinedCPU
- 用Verilog语言实现的流水线CPU设计,大家可以参考一下。-Using Verilog design language of the line CPU, you can reference.
Structure_Design_of_Drgon2E
- 国产CPU龙芯2E设计方面的说明文档,是编程以及CPU设计和学习的理想材料-Domestic Godson 2E CPU design documentation, programming and CPU design and is ideal for learning materials
utility
- 全国电子设计大赛:智能电动车的设计.实现功能:以AT89C52单片机为核心,用双CPU实现电动小车的实时智能控制。CPU对各个传感器检测到的信号进行综合判断处理,然后发出控制信号给电机驱动电路控制小车运行。系统采用PWM动态控制电动机转速,采用红外光电传感器检测引导线,矫正行车路线,超强纠偏。采用霍尔元件检测车轮转动,测速计算距离。用看门狗X5045实现数据存储;采用接近开关准确的探测出金属片的位置、长度;采用光电传感器检测障碍物。-KFJSKFJIOEJLKSFJKLDFJFF
CPU-heat-sink-and-thermal-analysis-of-structural-d
- CPU散热器结构设计与热分析,对于做机械设计的朋友应该有一定的参考作用!-CPU heat sink and thermal analysis of structural design, mechanical design for a friend so there should be some reference!
VerilogHDLexample
- 可综合的VerilogHDL设计实例 ---简化的RISC CPU设计简介-VerilogHDL comprehensive design example can be simplified RISC CPU design--- Introduction---
cpu16
- 16位cpu设计vhdl源码。主要实现risc机器模型-16-bit cpu design code
32mips-cpu
- 基于32为MIPS指令设计的cpu,32 for the MIPS instruction based on the design of the cpu-32 for the MIPS instruction based on the design of the cpu
alu
- 加法器源码 CPU设计专用 VHDL实现-Source adder VHDL CPU designed to achieve specific
CPU
- mips系列,CPU的Verilog语言设计,自己写的-mips series, CPU of the Verilog language design, to write their own
access_hardware
- 实例演示了DELPHI 检测计算机硬件如:cpu,内存,磁盘,光盘,显示器模式、端口、电池,鼠标等的方法,源码设计比较详尽。-DELPHI examples demonstrate the detection of computer hardware, such as: cpu, memory, disk, CD, display mode, port, battery, mouse, and other methods, a more detailed source design.
CPU-design
- 使用VHDL语言开发的CPU硬布线设计,在实验电路可以使用加法,和减法与或等简单操作-CPU using VHDL language development of hard-wired design, the circuit can be used in the experimental addition, and subtraction or other simple operations with
POC-Project
- 系统总线与打印机之间的借口:并行输出控制器POC的设计。涉及POC与CPU,POC与printer之间的握手操作。-Between the system bus and an excuse for the printer: parallel output controller POC design. Involved in POC and CPU, POC and the printer handshake between the operations.
CPU
- CPU亲和性代码,案例中2个CPU可以根据情况自己设计-CPU affinity code, case 2 the situation can design their own CPU