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address_gen
- 基于FPGA使用Verilog语言构成的DDS信号发生器-DDS signal generator based on FPGA using Verilog language constitutes
ddsjiangjie
- 一篇关于用FPGA设计DDS的文章，个人觉得还是写得不错的，有着做这个的同学可以下载看看。-An article on the FPGA design of DDS, personally feel that is well written, has to do this students can download to see.
Pro_19
- Fpga,DDS,PLL,rom(正弦波)(f<13MHz,需要滤波)(Verilog)-Fpga, DDS, PLL, rom
5-15
- DDS的实现，在XILINX的FPGA验证通过。使用ROM实现的。-DDS implementations, in XILINX FPGA verification by. Using ROM.
BASYS_DDS
- fpga 实现dds,共享给大家了，如果有问题请交流，-fpga implementation dds, for everyone to share, if there is a problem, please exchange, thank you
ad9850
- 介绍了用FPGA控制DDS产生任意频率范围之内的可调制正弦波，13位BPSK,ASK等。控制字由串口写入。-verilog control AD9850 to get psk ask
sun
- 基于FPGA的DDS波形发生器的设计与实现,-DDS waveform generator based on FPGA Design and Implementation,
DDSFPGA
- 在fpga中实现的DDS程序，程序，测试可用-DDS program, implemented in fpga program, the test can be used
am
- 基于FPGA的DDS，产生任意频率的正弦波，并且加入am调制-Generate any frequency sine wave, and join am modulation based on FPGA DDS
SPWM-output
- 利用FPGA，采用DDS技术产生具有死区控制的SPWM波-To utilize FPGA, generation of DDS technology with deadband control SPWM wave
FPGA_DDS
- 本程序是基于FPGA的DDS产生任意的波形输出，已经编译完-This procedure is based on FPGA DDS arbitrary waveform output, has already been compiled
signal-generator
- Design of DDS signal generator based on VHDL+FPGA, has been through the adjustable, can be directly used, simulation -DDS signal generator circuit design, Verilog source code, can be directly used, simulation
DDS_8bit_5_7yigai
- DDS函数信号发生,基于fpga的DDS函数信号发生器，已在黑金版上验证。-DDS Function happen fpga-based DDS Function Generator has been verified on the black gold version.
qpskddc
- fpga实现dds和下变频。DDS 技术具有频率切换时间短，频率分辨率高，频率稳定度高，输出信号的频率和相位可以快速切换，输出相位可连续，并且在改变时能够保持相位的连续，很容易实现频率、相位和幅度的数字控制。它在相对带宽、频率转换时间、相位连续性、高分辨率以及集成化等一系列性能指标方面远远超过了传统频率合成技术。因此在现代电子系统及设备的频率源设计中，尤其在通信领域，直接数字频率合成器的应用越来越广泛。-fpga implementation dds and downconversion. DD
dds_double_new
- FPGA用verilog语言编写的 dds程序，两路输出，频率可调，相位可调，输出波形可调-FPGA using verilog language dds program, two outputs, adjustable frequency, phase adjustable, adjustable output waveform
dds_again
- 基于FPGA的DDS。可以产生三种波形：正弦，方波，三角波。频率分辨率0.012Hz。频率从0至25MHz任意可调。-FPGA-based DDS. Can produce three waveforms: sine, square, triangle wave. Frequency resolution 0.012Hz. Frequency is adjustable from 0 to 25MHz.
cos_value
- 用于生成FPGA中RAM所需要的初始化文件dds.mif,此文件生成的是余弦波形。-This document of .m can generate document of .mif to provide data for RAM of FPGA.
xinhaoyuan
- DDS产生多种波形信号发生器，包括正弦波，三角波，方波，锯齿波。运行于Altera Cyclone FPGA平台。-DDS signal generator generates a variety of waveforms including sine, triangle wave, square wave, sawtooth wave. Running on Altera Cyclone FPGA platform.
2fsk_0516
- 运行于Altera Cyclone FPGA平台,基于DDS原理的FSK信号发生器，可产生FSK信号-Running on Altera Cyclone FPGA platform, based on the principle of DDS FSK signal generator for FSK signal
cycloneiii_3c16_signal
- 基于FPGA，DDS原理的双路正弦波信号发生器，含有与msp430通信模块程序。-Based on FPGA, DDS principle of dual sine wave signal generator, communication modules contain msp430 procedures.