搜索资源列表
aes
- verilog实现的AES-128加解密程序，FPGA验证通过-verilog implementation of AES-128 encryption and decryption process, FPGA verification through
aes
- aes的加密解密算法的源代码以及测试源代码和仿真结果图-aes encryption decryption algorithm source code and test source code and simulation results map
HMAC-MD5
- HMAC — MD 5算法的硬件实现，可以对初学者有一定得帮助。-HMAC- MD 5 algorithm for hardware implementation
DES_Verilog
- 这是我用Verilog写的DES加解密程序,准确的说这是一份实验报告,里面不但有程序还有简单的注释[主要是针对仿真的波形的],我主要写的是主控部分,密钥生成部分参考了下版原康宏的程序.该程序即可加密也可解密,选用CycloneII器件即能跑到100Mhz以上.-This is what I used to write Verilog the DES encryption and decryption procedures, accurate to say that this is a test
高级加密算法
- AES加密和解密源码！-AES encryption and decryption source!
rc4
- RC4算法，WEP算法，加解密，密钥长度256-RC4 algorithm, WEP algorithm, encryption and decryption
inverter
- rc5的decryption，同样带state machine，同样有四个状态-RC5 of decryption, with the same state machine, the same four state
RC5_inv
- 不带state machine的decryption of rc5-State machine without the decryption of rc5
IDEA_DE_TOP
- IDEA解密运算模块，运算速率100Mbps，请大家参考-IDEA decryption computing module, computing speed 100Mbps, please refer to
RIJNDAEL_DE_TOP
- AES解密运算模块，运算速率100Mbps，请大家参考-AES decryption computing module, computing speed 100Mbps, please refer to
rc5decstmac
- RC5 decryption algorithm implementation, using vhdl, with state machine implementation, use ieee papers for more detailed descr iption.
t3_enc
- triple des encryption decryption
vongrunigen
- 语音信号处理，关于语音加密和解密的一个例子-Speech signal processing, voice encryption and decryption on an example of
AES_verilog
- AES 128bit数据,128bit密钥加解密的verilog语言实现-AES 128bit data, 128bit key encryption and decryption of the verilog language implementation
rsa_IN_vhdl
- FULL SIMOLATION IN VHDL FOR RSA DECRYPTION
DESsuanfa
- DES的加解密算法的实现，无错，非常适合毕业设计运用-DES encryption and decryption algorithm, error-free
aes_decrypt
- This the Top Module for AES Decryption algorithm-This is the Top Module for AES Decryption algorithm
test_dec1
- This Module creates the test Bench for AES Decryption Algorithm
FPGA_128_AES_decryption
- 以FPGA具體實現的128-bit AES decryption，包括介紹文件以及源碼。-FPGA-based 128-bit AES decryption
decryption
- AES decryption in VHDL!! Wit LCD controls