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rom_des.zip
- DES 加密算法的VHDL和VERILOG 源程序及其TESTBENCH。
3des_vhdl
- 3重DES(3DES)加密算法的问答及其VHDL实现。
mos_des
- 这是一个用VHDL语言实现了DES加密功能的程序,由于DES加密的模式,解密时需把密要倒置
des3
- The best 3des code. The best area
aes_thesis_v1.0
- AES VERILOG CODE 128 192 32DES比較-AES VERILOG CODE 128 192 32DES Comparison
topic
- DES加密算法的VHDL和VERILOG源程序- Xilinx开源共享61EDA代码工厂-DES encryption algorithm of VHDL and VERILOG source code- Xilinx factory open source code sharing 61EDA
key
- 用vhdl语言实现des编码中的密钥产生 是des编码中重要的一部分-Des code using vhdl language in the key generation is an important part des coding
3des_vhdl_latest
- 3DES的VHDL IP核,64位 标准FIPS 46-3 NIST,并且使用3组64位密钥-The VHDL implementation 3DES,The core complies with the Triple-DES 64-bit block cipher defined in FIPS 46-3 NIST standard and operates with three 64-bit keys. Functional Descr
LIP1602CORE_des
- Verilog DES Encrption Module
Description-of-DES-with-VHDL
- 用VHDL描述DES算法 用硬件的方式DES加解密 体现了硬件编程人一般思想-DES algorithm using VHDL descr iption of the way with hardware DES encryption and decryption hardware programming reflects the general thinking of people
DES_VHDL
- DES VHDL FPGA CODING
ppx16_0146
- pic core in vhdl contient tous les descr iption des composants du pic 16f84 -pic core in vhdl contient tous les descr iption des composants du pic 16f84
SIMULATION-AND-SYNTHESIS-OF-TRIPLE-DES-BLOCK-CIPH
- SIMULATION AND SYNTHESIS OF TRIPLE-DES BLOCK CIPHER USING VHDL
FPGA-BASIC-DES
- 采用vhdl实现DES算法,有详细的设计理论。为电子科技大学研究生论文。-VHDL realize the use of DES algorithm, a detailed design theory. For the University of Electronic Science and Technology Graduate thesis.
DESdpj
- 简明的DES密码算法的VHDL代码,实现了基本的加脱密-Condensed DES cryptographic algorithm VHDL code, basic plus decryption
3des_vhdl_latest.tar
- DES/3DES open core used VHDL. 在实际系统中使用过,完美无缺。-DES/3DES open core used VHDL. Used in the actual system, perfect.
DES
- 一种基于VHDL的DES加密实现方法,经过实际验证可以运行-A VHDL-based DES encryption method, you can run after the actual verification
DES-S
- des加密算法在MATLAB中,通过VHDL语言的实现-des encryption algorithm in MATLAB, through the realization of VHDL language
DES-Encryption
- VHDL Encryption/ Decryption Algorithm
tb_des_loop
- des——top加密vhdl模块,顶层设计接口用于docsis3.0加密(Des - Top encryption VHDL module, top-level design interface for docsis3.0 encryption)