搜索资源列表
emifa_ram
- FPGA与DSP的EMIF通信,EMIF的RAM这方面相应的程序-FPGA and DSP EMIF communication
FPGA2-DSP2-EDMA
- 例程是FPGA通过EMIF给DSP发送数据,里面包含了一个简单的状态机和一个基于IP核的fifo,适合初学者-Routine is the FPGA to send data to the DSP via EMIF, which contains a simple state machine and an IP-based core fifo, suitable for beginners
FPGA_emif
- 接口模块,通过对高位地址的编码可实现在一个FPGA中配置四个独立的功能模块,每个功能模块具有一个带FIFO的输出口和13个独立的可由DSP读写的寄存器,寄存器功能可自定义。模块还包含两个全局寄存器,可实现全局复位,中断等功能。该模块以应用于实际的项目中,目前运行良好-FPGA to emif
FIFO_POLL
- DSP通过EMIF接口访问FPGA内部寄存器(FD6713开发板)-DSP access the internal registers in FPGA via EMIF interface (FD6713 Development Board)
REGISTER
- DSP通过EMIF接口访问FPGA内部寄存器(FD6713开发板)-DSP access the internal registers in FPGA via EMIF interface (FD6713 Development Board)
Dual-RAM
- DSP EMIF双口RAM和FPGA实现高速通信-DSP EMIF dual-port RAM and FPGA to achieve high-speed communications
FIFO
- FPGA TI DSP的EMIF接口的地址总线问题-FPGA FIFO
EMIFA_FPGA_DMA
- DSP中通过EMIF接口与FPGA通信源码-DSP via the EMIF interface with FPGA communication source