搜索资源列表
CTune0.9
- 主要用于时序分析,无论是ASIC还是FPGA以及DSP都很有效的.欢迎大家使用-Mainly used for timing analysis, whether it is ASIC or FPGA and DSP are very effective. Welcome to use
StaticTimingAnalysis
- FPGA硬件设计的时序分析详细教程,包括保持、建立时间概念、毛刺等分析-FPGA hardware design tutorials detailed timing analysis, including the establishment of the concept of time, such as analysis of burr
fpga
- 这是我的fpga分析时序心得,比较详细,欢迎下载-This is my fpga analysis of time series ideas and more details, please download
TimingAnalysis
- 这是有关FPGA时序分析的一个实验步骤,欢迎大家下载啊-This is the FPGA timing analysis of an experimental procedure
Verilog000
- FPGA的学习,熟悉QuartusII软件的各种功能,各种逻辑算法设计,接口模块(RS232,LCD,VGA,SPI,I2c等)的设计,时序分析,硬件优化等,自己开始设计简单的FPGA板子。 ③、NiosII的学习,熟悉NiosII的开发流程,熟悉开发软件(SOPC,NiosII IDE),了解NiosII的基本结构,设计NiosII开发板,编写NiosII C语言程序,调试板子各模块功能。-Verilog语言的学习,熟悉Verilog语言的各种语法。 ②、FPGA的学习,熟悉
fpga0023202323
- FPGA时序分析说明。对于高速时钟设计中的时序分析与约束有帮助-FPGA,TIME
123
- 华为_静态时序分析与逻辑设计,FPGA时序分析友-Huawei _ static timing analysis and logic design, FPGA timing analysis of Friends
PerfectTiming
- 完美时序,含中英文两个版本!这应该是FPGA时序分析方面最经典最权威的书了,相信会对FPGA爱好者有很大用处!-Perfect timing, with two versions in English! This should be the most classic FPGA timing analysis the most authoritative book, that would be very useful FPGA lovers!
Linux-driver-development2
- 作者:华清远见嵌入式学院。《Linux设备驱动开发详解》(08&09年度畅销榜TOP50)第2章、驱动设计的硬件基础。本章讲解底层驱动工程师必备的硬件基础,给出了嵌入式系统硬件原理及分析方法的全景视图。2.1节讲解微控制器、微处理器、数字信号处理器以及应用于特定领域的处理器各自的特点。2.2节对嵌入式系统中所使用的各类存储器与CPU的接口、应用领域及特点进行了详细讲解。2.3节讲解常见的外设接口与总线的工作方式,包括串口、I2C、USB、以太网接口、ISA、PCI和cPCI等。嵌入式系统硬件电路
FPGA
- FPGA设计中的时序分析及异步设计注意事项 -FPGA design timing analysis and design considerations for asynchronous
top_PR
- 用户将使用具有局部重配置能力的ISE 12.1,进行综合HDL模块并完成设计。之后,使用PlanAhead12.1来布局规划设计,并内部调用执行和分析工具,包括:调用FPGA Editor查看设计实现 调用Constraint Editor创建时序约束;用Timing Analyzer进行时序分析。最后,用户可以用XUPV5开发板来进行硬件验证,并用iMPACT软件来下载全局和局部比特流。-Top-level design dynamically reconfigurable, static l
sram1
- 这个是FPGA最简单控制SRAM的方法之一,可以直接嵌套到你们的代码中,建议先看时序分析-This is the simplest control SRAM FPGA one of the methods can be nested directly to your code, look at the timing analysis proposed
Timing-analysis
- FPGA玩转Altera之时序篇,包括时序分析注意事项-Altera play the FPGA XuPian, including timing analysis the matters needing attention
FPGA--TimeQuesREV1.0
- FPGA那些事儿--TimeQuest静态时序分析REV1.0,这个不用多说了吧,经典之作,大家多多学习,共同进步-FPGA that thing- TimeQuest static timing analysis REV1.0, this goes without saying it, classic, everyone can learn together and progress ~ ~
FPGA--TimeQuestREV2.0
- FPGA那些事儿--TimeQuest静态时序分析REV2.0,这个不用多说了吧,经典之作,大家多多学习,共同进步~~这个是版本2-FPGA that thing- TimeQuest static timing analysis REV2.0, this goes without saying it, classic, everyone can learn together and progress ~ ~ This is version 2
IO-timing-constrain-in-fpga
- 对FPGA的IO口的时序分析小结,能够详细理解其约束时序规则-FPGA timing analysis summary of IO port, capable of a detailed understanding of its timing constraint rules
FPGA那些事儿--TimeQuest静态时序分析REV7.0
- FPGA 静态时序分析 TimerQuest(FPGA static timing analysis TimerQuest)
FPGA那些事儿--TimeQuest静态时序分析REV7.0
- FPGA那些事儿--TimeQuest静态时序分析(FPGA those things, --TimeQuest static timing analysis)
FPGA那些事儿--TimeQuest静态时序分析REV6.0
- FPGA那些事儿-TimeQuest静态时序分析(Static timing analysis of TimeQuest)
ModelSim电子系统分析及仿真
- 此文档详细说明了如何利用Modelsim软件对FPGA逻辑代码进行功能仿真和时序仿真的方法,并通过相关例子进行讲解说明(This document explains in detail how to use Modelsim software to perform functional simulation and time series simulation of FPGA logic code, and explain how to use some examples.)