搜索资源列表
image1280-50M
- FPGA控制LCD屏幕显示图像(方块移动,闪烁等)-FPGA control LCD to display.
FPGAforlcdDisplay
- FPGA ship FOR LCD display, the LCD is 12864.有兴趣的初学者可以看看,高手绕过。-FPGA ship FOR LCD display, the LCD is 12864 MODEL.
LCD1602_V0.2
- fpga的一个lcd程序,程序很好,希望各位给个赞-A LCD procedures of fpga
25_lcd_system
- 这个是我从黑金社区上找过来的 是关于LCD系统设计的代码 希望对大家学习FPGA有用-This is I can come the black community is on the LCD system design code, we hope to learn useful FPGA
20_lcd_test
- lcd test,基于FPGA的lcd测试,很好的学习资料,大家都来学一学-is very good
tft35inch_2C8_test
- 基于FPGA的ip核lcd控制器 320240分辨率-ip nuclear lcd controller FPGA-based resolution of 320,240
LCD12864-for-chinese-verilog
- 在FPGA平台上,利用verilog编程在LCD上显示汉字的例程。(来源于大西瓜例程)-lcd for chinese based on verilog——code example
Pmod_tr2
- FPGA pomd 接口演示实验包括蓝牙,gps,液晶显示等-FPGA pomd demonstration experiments interfaces including Bluetooth, gps, LCD, etc.
12_lcd_spi
- 这个一份fpga的lcd显示一张图片的源代码-about lcd
LCD126484
- 这是一份fpga的lcd的12864的程序-about 12864
baseonFPGAclock
- 用verilogHDL语言写的基于FPGA的电子钟。里面包含闹钟、秒表、日历、时间设置等功能,可用LCD显示-verilog language, implemented on the FPGA alarm clock, calendar, time display, stopwatch in one of the electronic clock and calendar. Can be displayed on LCD
example20-LCD12864
- FPGA 12864lcd驱动程序,verilogHDL语言开发,可直接使用。-FPGA 12864 lcd driver, verilog HDL language development, it can be used directly.
MT9M001
- FPGA驱动MT9M001的verilog代码,里面还有ddr3部分将图像数据进行存储,lcd进行图像显示,里面的摄像头驱动部分很详细,大家可以多研习研习-Verilog driver MT9M001 code, which is also the DDR3 image data storage, LCD display, which drives the part is very detailed, we can learn more
20_lcd
- FPGA实现LCD显示,verilog编程控制-FPGA achieve LCD display, Verilog programming control
ov7670_lcd_verilog
- OV7670 摄像头LCD 显示的FPGA代码,测试通过-OV7670 camera LCD display FPGA code, the test passed
lcdILI9325FPGA
- lcdILI9325FPGA lcd FPGA
zonghe
- Quartus环境下编写的FPGA综合测试程序,能实现频率测量,数码管显示,12864液晶显示,1602液晶显示,点阵扫描显示,AD采样程序,DA输出电压程序,可以通过拨码开关控制上述功能的分别实现,还可以通过遥控器实现上述功能的控制实现。-Quartus environment prepared by the FPGA integrated test program, to achieve frequency measurement, digital display, 12864 LCD, 1
tinycpufiles
- TinyCPU源码,使用Verilog编写的资源占用极少的CPU。Quartus工程,可跑在Altera MAXII CPLD上,也很方便移植到其他FPGA上。CPU使用200个逻辑单元,外设(SPI,LCD等)使用180个逻辑单元。 内含汇编编译器源码(VC2008),可编译CPU对应的汇编文件。-The sourcecode of TinyCPU, which only consumed very few logical cells, written by Verilog. It is
sdram_ov7670_vga
- 基于FPGA的CMOS摄像头视频采集传输,lcd显示。-FPGA-based CMOS camera video capture transmission, lcd display.
LCD1602
- 1602程序,适用于FPGA/VHDL对于LCD1602液晶屏的控制。(1602 program, apply to FPGA/VHDL for LCD1602 LCD screen control.)