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FPGA从cy7c68013读取数据实现
- FPGA将从CY7C68013A读到的数据写入SRAM-FPGA
T2_USB_IN.rar
- usb芯片cy7c68013从fpga中读入数据的演示程序，verilog语言,CY7C68013 chip usb read from the FPGA into the data presentation process, verilog language
Mars-SP3-U_SCH.rar
- 一块XC3S400 FPGA电路板的原理图，板子上有CY7C68013A作为USB接口,A XC3S400 FPGA circuit board schematics, board have CY7C68013A as USB interface
CY7C68013.rar
- USB2.0的Verilog实现，含有完整的FPGA代码,Use Verilog to implement the USB2.0 protcol
FPGA
- OV7670摄像头上位机软件配合使用的FPGA程序源码(整套系统需要上位机软件，CY7C68013程序，FPGA程序)-The OV7670 camera head machine software with the use of FPGA program source code (the entire system requires the host computer software, CY7C68013 program, FPGA program)
CY7C68013_DEMO
- cy7c68013原理图和程序 实现fpga和68013通信程序代码-Cy7c68013 principle chart and procedures To realize the fpga and 68013 communication program code
vb
- VB写的读取FLASH存储的图像数据，并可以显示图像（图像显示，和读数两大功能），通信采用的68013+FPGA-FLASH write VB to read the stored image data, and can display images (image display, and the readings of the two functions), communication used by 68013+ FPGA
F2812-USB
- 用protel DXP设计的F2812-USB电路板，本工程包括FPGA程序和CY7C68013固件程序的PCB原理图和PCB板图。-With protel DXP designed F2812-USB circuit board, the works include the FPGA programs and CY7C68013 firmware for PCB schematic and PCB board diagram.
USB2_0
- USB2_0控制器CY7C68013与FPGA接口的VerilogHDL实现.rar-CY7C68013 and FPGA controller USB2_0 interface VerilogHDL achieve. Rar
usb_wr_firmware
- CY7C68013固件 FPGA把数据通过usb写入pc slave 模式 使用 EP6 -USB:FPGA write data to PC by USB change from cypress example slave mode and use EP6 bulkloop.c firmware based on the firmware frameworks. Building this example requires the full vers
usbFPGAconnect
- 该例程是PC机通过FX2-CY7C68013-A的USB2.0控制芯片与FPGA实现通信。其中的工程和代码包括PC机上的USB固件程序、驱动程序、上位机程序，FPGA上的VERILOG通信程序。-The routine is a PC, through the FX2-CY7C68013-A of the USB2.0 controller chip and the FPGA to achieve communication. One of the projects and code, incl
CY7C68013FPGA
- USB控制芯片cy7c68013与FPGA通过slave fifo方式通信，块传输数据-USB controller chip and FPGA cy7c68013 way communication through the slave fifo, block data transfer
CY7C68013AD
- 本文件是一个我买的开发板的原理图，型号是:CY7C68013,用ALTIUM或PROTELL DXP打开。-This document is a development board I bought the schematic diagram, model is: CY7C68013, with Altium or opens PROTELL DXP.
T3_USB_OUT
- cy7c68013向外部发送一个数据 ，发送至fpga，fpga的实例程序 -CY7C68013 to send an external data, sent to the fpga, fpga examples of procedures
usbin_v1.7
- 用于cy7c68013与fpga的从FIFO通讯.版本1.7-For the CY7C68013 and FPGA communications from the FIFO. Version 1.7
USB20develop
- cy7c68013结合FPGA的开发笔记，本人原创，FPGA平台是DE2-cy7c68013+fpga develop note
FPGA IP cores
- FPGA IP cores on verilog for USB CY7C68013, VGA, Ethernet DM9000A, Sound WM8731.
CY7C68013固件程序 FPGA测试Verilog程序
- CY7C68013固件程序 FPGA测试Verilog程序(CY7C68013 firmware, FPGA test, Verilog)
CY7C68013 Verilog test
- CY7C68013固件程序以及 FPGA测试Verilog程序，源代码(CY7C68013 firmware program FPGA test Verilog program, source code)
USB CY7C68013固件
- Keil 完成的固件。成功实现ARM与 FPGA的通讯(CY7C68013 IMX6+FPGA + KEIL)