FPGA实现非标准SPI总线数据的接收和解码，并实现ROM数据的读取和执行-FPGA implementation of non-standard SPI bus to receive and decode the data, and to achieve ROM data read and

verilog实现的DVI 视频编码输出与输入，已在altera Cyclone IV 上实现。-DVI encode and decode in Verlog language.Have been tested in altera FPGA Cycloene IV