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rs232
- 完整的RS232 Verilog源代码，支持波特率可调，支持调试命令，配合串口调试工具，可作为FPGA开发中的调试平台。-Full RS232 Verilog source code, support for baud rate is adjustable to support debugging command, with the serial debugging tools can be used as the debugging FPGA development platform.
Rs232sourcecode
- Working RS232 controller running at 9600 Hz. Consist of Transmitter and Receiver Module. Tested in FPGA Spartan 3 Included files for testing at FPGA - Scan4digit .vhd - to display at 7 sgement display - D4to7 .vhd - Convert HEX decimal to
async
- 用FPGA实现RS232，代码经过测试通过-FPGA implementation using RS232, the code has been tested through
WeatherChannel
- IP-over-RS232 enabled weather station, C code, code for FPGA and hardware schematics.
8051Core_RS232
- 包含了8051rs232设计的全部源码，可直接应用于sopc/FPGA设计中。-Contains all the source code 8051rs232 design can be directly applied to sopc/FPGA design.
RS232
- EP2C8Q208_Quartus_V8.0 基于FPGA实现RS232 VHDL代码-EP2C8Q208_Quartus_V8.0 FPGA-based implementation RS232 VHDL code
my_uart1_VERILOG_using-PLL
- Verilog uart example, RS232的Verilog例子。PC 发送一个字节（byte）到板子（FPGA），板子回发一个(byte+1).例子简洁，有注释。用到PLL，而且有3：2次数据采用-Verilog uart example，Verilog RS232 example，it s easy to understand, PC send 1 Byte RS232 code to FPGA, FPGA return 1 tht code，but Byte+1， Using P
ps2-RS232
- PS2键盘字符码输出，通过FPGA控制，与pc机实现串口通信（RS232）-PS2 keyboard character code output by FPGA control, serial communication with the pc-(RS232)
RS232
- 该代码实现了根据RS232协议发送、接收数据的功能。该模块可以移植到任何使用该协议的FPGA。-The code based on RS232 protocol to send and receive data. The module can be ported to any FPGA that uses the protocol.
async_transmitter
- RS232的FPGA code，利用Verilog實現傳輸的部分。
rs232uart
- 利用fpga完成rs232代码，完整程序-Using fpga completed rs232 code
rx_tx_module
- RS232串口通讯在的FPGA应用的v原代码-The v original code of the RS232 serial port communication in FPGA applications
rs232
- fpga与pc机的rs232的通信代码，简单全面-the fpga with pc rs232 communication code, simple and comprehensive
uart_async
- RS232串口通信代码，采用verilog HDL实现，在quartus上仿真通过并下载到fpga平台功能验证-RS232 CODE
RS232
- this code show how to use Altium to coding RS232 on FPGA-CPLD
uart_tx_rx
- 在altera的FPGA平台上实现rs232串口的自收发通信，速率为115200波特率，PC机使用串口调试助手即可观察结果。包含全部代码与工程，本人亲自测试通过。-Realization of self transmitting and receiving communication serial port of RS232 In altera on the FPGA platform, at a rate of 115200 baud rate, PC using serial debuggi
UART_FPGA_VerilogHDL
- FPGA RS232串口通信，Verilog HDL代码-FPGA RS232 serial communication, Verilog HDL code
Rs2322
- 该文件是在ise开发环境下的代码，实现rs232协议，并在FPGA上验证成功-This file is the code in ise development environment, to achieve rs232 protocol, and authentication succeeds on FPGA
RS232
- UART协议实现Verolog源码，可在FPGA上综合(UART Verolog source code)
RS232
- 串口收发代码，可设置速率，工程中已验证可用(Serial transceiver code, can set the rate, the project has been verified to be available)