搜索资源列表
turbo-interleaver
- 基于FPGA的Turbo码交织器的设计与实现 比较实用
FPGA上实现TURBO码的编码
- 在赛灵思的FPGA上实现的TURBO码的编码程序
GMSK
- GMSK的FPGA实现程序，全数字GMSK实现方案。-GMSK FPGA-implementation process, all-digital GMSK implementations.
4_31
- 这是一个交织器/解交织器的FPGA实现，虽然交织器的功能简单，但是其实现比较复杂-This is an interleaver/de-interleaver to achieve the FPGA, although the function of interleaver simple, but its more complicated to achieve
Turbo
- 基于fpga的交织编码器设计，主要讲叙如何在fpga上实现交织编码器。-something about turbo。
FPGA_turbo_decoder_new_ok_050920
- 用FPGA实现turbodecoder_new_ok.介绍了详细的实现原理并有详细的模块设计，模块详细注释和调试心得记录-turbodecoder by fpga
cf_ldpc_latest.tar
- we need exactly a complete turbo codes in either MATLAB or VERILOG
cocahome_20100403094552
- 实现基于FPGA的turbo码的编解码matlab代码-FPGA implementation of turbo codes based codec matlab code
TurboSimu
- Turbo码编码译码器的研究及其FPGA实现.sdf -Turbo
turbo_encoder
- 在赛灵思的FPGA上实现turbo码的编码程序,使用Verilog语言实现。-Implemented on Xilinx FPGA in the turbo coding principle, the use of Verilog language.
FPGA_Turbo
- 用FPGA实现turbo码的编写,对于初学者非常方便-how to use fpga to complete turbo，it is very useful for us
1
- 基于FPGA的改进turbo码译码器的设计与实现-FPGA-based turbo decoder to improve the design and implementation
FPGA_Turbo
- Turbo码编解码的FPGA实现，verilog语言编写-Implementation ofTurbo code on FPGA , using Verilog language
turbo_code
- LTE system, OFDM modulation and Turbo Coding, including Viterbi, BCJR and SOVA are extensively analysed, ending up with a system performance specification. These are used to implement a fixed length Turbo encoder, a 16-QAM modulator a
turbo_lte_ofdm_fpga_code
- LTE system, OFDM modulation and Turbo Coding, including Viterbi, BCJR and SOVA are extensively analysed, ending up with a system performance specification. These are used to implement a fixed length Turbo encoder, a 16-QAM modulator a
finalTURBOCODE_OFDM
- Throughout the project the LTE system, OFDM modulation and Turbo Coding, including Viterbi, BCJR and SOVA are extensively analysed, ending up with a system performance specification. These are used to implement a fixed length Turbo enco
30085
- turbo c writing, and random fireworks animation, size, color, make their own adjustments. the the
myTurbo_test
- Turbo编码的FPGA实现，采用了（7，5）RSC编码和循环移位交织，帧长度128bit(The FPGA implementation of Turbo coding adopts (7, 5) RSC coding and cyclic shift interleaving, and the frame length is 128bit.)
Turbo_VHDL
- 使用了Sova译码算法，实现的基于FPGA的Turbo码译码算法。( U4F7F u7528 u4B01 u7B1 u7B1 u7B1 u7801 u7B97 u6CD5 uFF0C u5B9E u73B0 u7684 u57FA u4E8EFPGA u7684Turbo u7801 u8BD1 u7801 u7B97 u6CD5 u3002)