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h264 Verilog
- h264 Verilog,用fpga实现基本档次功能。
H264verilogcore
- H264的VERILOG代码,基本实现了全部的功能-H264 of the Verilog code, the basic realization of all the functions
H.264
- H.264标准解码器全部verilog源码，包括帧内、帧间、变换编码、熵编码、滤波等所有模块-Standard H.264 decoder all verilog source, including intra-, inter-frame, transform coding, entropy coding, filtering all modules
H264
- h.264(verilog HDL) 这是基于流水线结构的H.264解码器源码-h.264 (verilog HDL) which is based on the pipeline structure of the H.264 decoder source code
bluespec-h264_latest.tar
- h264 vhdl/verilog implementation on FPGA platform
CAVLC
- H.264 CAVLC硬體原始碼下載，內附測試檔案。-H.264 CAVLC Hardware Verilog source code
H[mm.264
- 这是一个描述的文档，教你怎么写Verilog关于H264 的文章那个，考了非常受启发。-This is a descr iption of the document, teach you how to write Verilog that the article on the H264, the test is very enlightening.
h264.tar
- h.264 bluespec system verilog source code
DCT_IDCT
- H264/AVS中的离散余弦变换DCT以及反离散余弦变换IDCT的Verilog代码-H264/AVS the discrete cosine transform and inverse discrete cosine transform DCT IDCT of Verilog code
CAVLE-h264
- 本压缩文件包含了h.264压缩算法中的CAVLE的编解码模块（Verilog和VHDL两个版本），包含有仿真的testbench测试文件，综合后可以直接使用-The compressed file contains the h.264 compression algorithm CAVLE codec module (Verilog and VHDL both versions), including a simulation testbench test file, can be used d
581371_H.264verilog
- H264编码 verilog vivado(H264encoder verilog vivado)