搜索资源列表
mo0re_FSM
- -- Moore State Machine with explicit state encoding -- dowload from: www.fpga.com.cn & www.pld.com.cn--- Moore State Machine with explicit state encoding -- dowload from : www.fpga.com.cn
vhdl_model.rar
- VHDL实例,各个方面均有,基本语法,状态机,汉明码,寄存器,步进电机控制器,表决器,多路选择器,译码器等等,VHDL model,include: basic grammer,moore mealy state machine,register,counter,multi,decoder,et..
example2.rar
- 状态机一般分为三种类型:Moore型、Mealy型和混合型。此程序描述了Moore型状态机的基本构成,并配以波形仿真。,State machine will generally be divided into three types: Moore-type, Mealy-type and mixed type. This procedure describes the state machine of the Moore-type basic component, and with simula
moore_in_and_mealy_out_state_machine
- 此程序为带摩尔输入、米勒输出状态的状态机控制部分-This procedure with Moore for input, Miller output state control of some of the state machine
diyabiao
- moore状态机~~~ 用vhdl语言实现-moore state machine ~ ~ ~ using VHDL language
VHDL
- 状态机及其VHDL设计,详细介绍了状态机的基本结构、功能和分类,以及有限状态机的一般设计思路与方法、状态机编码方案的恰当选取、Moore和Mealy状态机的本质区别及设计实现-State machine and the VHDL design, described in detail the basic structure of state machines, function and classification, as well as finite state machine of the
zhuangtaiji
- 有限状态机及其设计技术是实用数字系统设计中的重要组成部分,也是实现高效可靠逻辑控制的重要途径,本程序为单进程moore型有限状态机底层设计源代码.-This procedure as a single process moore-type finite state machine underlying the design of the source code.
drinkmc
- cold-drink machine moore type
zhuangtaiji
- 十种状态机例子(VHDL)包括米勒型和莫尔型的状态机。-Dozens of examples of state machine (VHDL), including Miller and Moore type state machine.
state_machine_design
- 这是讲解状态机的一个资料,里面讲解了摩尔和米勒状态机的设计实例,很详细且有实例。-This is a state machine on the information, which Moore and Miller explained the design of state machine instances, and there are examples of very detailed.
example2
- moore状态机程序 一共有四个状况,空闲 idle 等待 ready 信号准备好后进入判决状态 decision 否则继续等待 ready信号;判决状态 decision 中将 oe、we 信号置低,同时根据read_write 判定下一个状态是读状态 read 还是写状态 write;如果 read_write 为‘1’读状态 read,否则写状态write;读状态将oe 置高,we 置低;写状态将 oe 置低,we 置高。-moore state machine processes a
FSM
- 这是用verilog硬件描述语言编的moore状态机代码-It is compiled verilog hardware descr iption language moore state machine code
CIC_Moore
- It is a complete project of Cache Interface Controller programmed in VHDL using the logic of Moore State Machine
VHDL2
- 一个关于VHDL的moore状态机的程序,让你了解状态机的运行方法。-One on the moore state machine VHDL procedures so that you understand the operation of the state machine approach.
VHDL_statemachine
- MOORE 和MEALY模型的状态机,用VHDL语言描述,本章讲述状态机实现的原理以及方法,希望对大家有用,同时有练习题和思考题-MOORE and MEALY model state machine, using VHDL language descr iption of the state machine implementation of this chapter describes the principle and method, we want to be useful, while
xu_lie_jian_ce_qi
- 本设计通过Moore状态机设计一序列检测计。当输入的序列含有预置的11100101序列中的正确顺序时,进入下一个状态,直到到达st8状态,一个序列检测完毕。值得注意的是,当输入为111100101时,检测计仍能检测出里面的11100101序列,同时,当一个序列检测完毕时,下一个序列的高位可以只含有两个11即输入为1100101时,检测计一样能检测一个正确的序列。-The design by Moore state machine to design a sequence of the detec
directshow
- Although Moore’s Law might have enabled the age of PC-as-media-machine, it took an entirely new class of peripherals—items such as PDAs, webcams, digital cameras and camcorders, MP3 players, and snazzy cell phones—to make the age of media computi
state_machine
- 摩尔状态机的程序,超经典的,用VHDL写的,初学者可以参考-Moore state machine program, ultra classic, written with VHDL, beginners can refer to
Vending-Machine-using-Moore
- Vending Machine simulation using Moore sequence
4bit_moore
- Moore machine is state machine whose output is a function of only the current state.