使用VHDL语言，实现通信脉冲编码调制（PCM）的u律压缩。,Using VHDL language, the realization of communication pulse code modulation (PCM) of u law compression.

This project features a full-hardware sound compressor using the well known algorithm: IMA ADPCM. The core acts as a slave WISHBONE device. The output is perfectly compatible with any sound player with the IMA ADPCM codec (included by defau

8路视频光端机 接收侧 VHDL源码，使用了千兆以太网SERDES芯片，基于TBI接口的PCM视频传输。-8-Channel Video Optical Receiver side of VHDL source code, using the Gigabit Ethernet SERDES chip, based on the TBI interface PCM video transmission.

The goal of this project is to design a MPEG Layer III (MP3) player using a FPGA board. The FPGA will read MP3 source files, decode them into a 16-bit Pulse Code Modulated (PCM) output, and play the audio files through an external speaker.