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Ripple carry counter with 4 bit resolution implemented in behavioral VHDL. attaches as well is a jpg with the logic gates bock diagram. this is an asinchronous design.
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Ripple Carry Counter. the synchronous version of Ripple Counter. a bit less fasr version the ripple counter but a synchronmous one that will work well on FPGA. wrriten in behavioral VHDL.
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it is 4 bit ripple carry adder. it is one type of counter you can say. in which carry is added. it is vhdl code and its waveform which is run in altera quars II.
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