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7segment
- a seven segment display using VHDL
verilog_count4_led7s
- 利用子模块四位计数器及七段数码显示译码器，设置成一个可以数码显示的四位计数器-The use of sub-module 4 seven-segment digital display counter and decoder can be set to a digital display of the four counters
HX108-2AM
- HX108-2七段数码管超外差式收音机原理分析与组装过程-HX108-2 seven-segment digital tube superheterodyne radio principles of analysis and assembly process
user_logic_SEG7_LUT_8
- freeDev数字应用开发板中的七段数码管的IP核的verilog实现-freeDev digital application development boards in the seven-segment digital tube of the IP core implementation of the verilog
shumaguan
- 基于MSP430的七段数码管程序 C语言编程-MSP430-based seven-segment digital tube procedure C language programming
LIBRARYIEE1
- 译码器，将八位输出转换为七段译码显示，相当于7448驱动译码管-Decoder, the 8 output is converted to seven segment decoding shows that the equivalent of 7448
display_prev_built
- there are lots of problems about seven segment display in vhdl
hid_kb
- Example firmware that emulates a HID-class keyboard using the buttons and seven-segment display on the DVK board.
countdown
- 用STAR ES598PCI单板开发机设计一个与七段LED显示器，显示一个倒计时时钟，设置一个初值，初值的设置按照时间制，超过最大值显示“ERROR”，按任意键接着设置。该初值每隔一秒改变一次并显示改变后的值，LED显示器显示天、时、分、秒的动态值。倒计时结束后显示“OVER”。-STAR ES598PCI single board machine with the development of a seven-segment LED display designed to show a cou
Binarydigitalencoder
- 设计应用接口作为一个十六位二进制编码器的输入口，并用该口作为四位LED七段显示器的输出口，循环显示其编码的结果。利用逻辑开关板输入一个十六位的二进制数，利用LED七段数码显示控制电路板的LED七段显示器，循环显示与所输入的十六位二进制数相对应的四位十六进制数。 -Design Application Interface as a 16 binary encoder input port, and use the mouth as the 4 LED seven-segment display
Digitalflashingdisplays
- 用STARES598PCI单板开发机设计一个应用接口芯片作为四个七段LED数码管的输出口，编写一段程序，使8个LED数码管依次闪烁左移显示从输入口的逻辑开关读入的4位数字，闪烁频率为每秒一次。其外，还需实现一些附加功能，比如：可控制左移还是右移；可重新输入另外一个四位数；输入时可回显；以及输入时的十六进制到十进制的转换的等问题。-Machine Design STARES598PCI veneer developed with an application interface chip as t
1111
- 通过键盘设定温度和加热时间。 （2）使用DS18B20采集温度，采用七段数码管显示当前温度和剩余时间，并和设置的温度进行比较。 （3）当温度低于设定值时，通过DAC0832输出电压供给发热电阻RT1,使其温度升高。 -Through the keyboard setting temperature and heating time. (2) The use of DS18B20 collecting temperature, using seven-segment digital t
down_51vip_com_VC11
- 如题，你看看吧，七段数码显示的数字电子时钟-Such as the title, you look at the bar, seven-segment digital display of the digital electronic clock
The_Final_Exp
- 嵌入式系统课程设计题目（2009年） 七段数码管数字钟（▲） 关键词：数字时钟 1、 硬件：JXARM9-2410教学实验箱，PC机。 2、 软件：PC机操作系统Windows（2000、XP）ADT IDE集成开发环境。 -Design of Embedded Systems Course Title (2009) seven-segment digital tube digital clock (▲) Keywords: digital clock 1, the hard
qiduanma
- 用verilog描述的七段码程序，包含测试文件，经过了quartusii仿真测试并成功下载到DE3板子-Described in the seven-segment code with verilog program, including test file, after quartusii simulation testing and successfully downloaded to the board DE3
lin
- 以c8051f360单片机为基础的数字时钟，六位七段译码显示-To c8051f360 microcomputer-based digital clock, six seven-segment display decoder
LED7s
- 用VHDL语言编写的 LED七段显示译码器-Written in VHDL language with the LED seven-segment display decoder
SMGJX
- proteus 六位七段数码管数码管静态显示从零至F-proteus 6 Seven-Segment Digital control Digital control static display- from zero to F
VHDL
- 用VHDL语言设计七段显示译码器用VHDL语言设计七段显示译码器-VHDL language design with seven-segment display decoder
PCLED1
- 七段数码管显示分 秒值。程序开始运行，时间值为00-00，每隔一秒。时间值改变一次-Seven-Segment LED display minutes and seconds values. Program starts running, the time value of 00-00, every second. Time value changes once a