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FPGA从cy7c68013读取数据实现
- FPGA将从CY7C68013A读到的数据写入SRAM-FPGA
用FPGA实现SRAM读写控制的Verilog代码
- 用FPGA实现SRAM读写控制的Verilog代码-SRAM FPGA implementation using Verilog code to read and write control
sram读模块基于FPGA的实现
- sram读模块基于FPGA的实现 verilog源代码,sram
fpga_drive_ad7892.rar
- 利用FPGA驱动12位的AD7892进行模数变换，并将数据存储到SRAM中。FPGA型号为EP1C3-144。并通过LED将12位AD值显示出来。,The use of FPGA-driven 12-bit AD7892 analog to digital conversion, and data is stored in the SRAM. FPGA model EP1C3-144. Through the LED will be 12-bit AD value is displayed.
EP1C3
- fpga LCD 最小系统开发板原理图还内存与SRAM-fpga LCD development board schematics minimum system memory and SRAM is also
use-CPLD-SRAM--driving-TFT-lcd
- 用CPLD+SRAM驱动数字TFT屏的例子，希望对大家有所帮助-With CPLD+ SRAM drive digital TFT screen example, we want to help
sram
- SRAM控制器，含整个工程 vSRAM控制器，含整个工程 SRAM控制器，含整个工程-SRAM SRAMSRAMSRAMSRAMSRAMSRAMSRAMSRAM
Verilog-SRAM
- 用verilog hdl语言编写的fpga与片外sram 的读写控制-With the verilog hdl language fpga sram chip with read and write control
sram
- 用FPGA 控制sram读写程序的小程序，-fpga control precedure
CY7c68013_fpga_write_sram
- FPGA自FX2 slavefifo中读取数据，写入至SRAM-FPGA since FX2 slavefifo read data, write to the SRAM
niossramflash
- 在altera FPGA ep3c25器件上实现niosii+sram+flash-Altera FPGA ep3c25 in devices to achieve niosii+ sram+ flash
FGPA-SRAM-Programe
- FPGA编程方法介绍，方便学习VHDL,公供大家参考-fpga programe medoth, study hardware vhdl language
Protecting_FPGA
- How to protect your FPGA design (IP) on SRAM based FPGA s against copying.
yuyincaiji
- 语音采集与回放系统源代码：1.为了使读音数据存储的时间更长，速度更快，选用了256K*16Bit的SRAM；2.为了减少单片机的控制复杂度，使用了FPGA来控制SRAM的读写操作，节约了不少单片机的I/O资源；3.为了以后的高速数据存储，本设计中加入了fifo,其位宽及深度可在程序中自由设置，方便灵活。-Speech acquisition and playback system source code: 1. In order to make pronunciation longer data
FPGA2SRAM
- 利用FPGA向SRAM中传输数据，可用于FPGA芯片的初始化和配置-The use of FPGA to transmit data to the SRAM, FPGA chips can be used for initialization and configuration
sram_saa1117verilog
- 图像采集、存储控制verilog源代码，fpga控制SAA1117,采集数据存储到sram，仿真编译测试都能通过-Image acquisition, storage, control verilog source code, fpga control SAA1117, collecting data to sram, simulation tests can be compiled by
sram
- 基于FPGA的SRAM控制程序，里面附加了在线逻辑分析功能的程序，调试时相当的方便-SRAM-based FPGA-control program, which added an online feature of the program logic analysis, debugging very convenient when
sram
- a verilog sram code. use it to manipulate sram on fpga
SRAM
- FPGA控制SRAM的VERILOG源码-The VERILOG source code control SRAM FPGA
Sram(v0.2.20090115)
- SRAM FPGA编程 CYLOON2系列均可使用-SRAM FPGA programming CYLOON2 series can be used