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SRAM@DMA实验
- ALTERA NIOS处理器实验，QUARTUS下用VHDL编译成处理器，然后NIOS SHELL下C 语言运行。实验SRAM和DMA调度-Altera NIOS processor experiments QUARTUS using VHDL compiler into processor, then NIOS SHELL C language runtime. Experimental SRAM and DMA Scheduling
sram
- sram操作vhdl源程序，内有sdram模型，控制器设计，及测试源程序-sram operating in vhdl \doc DDR SDRAM reference design documentation \model Contains the vhdl SDRAM model \route Contains the Quartus 2000.05 project files a routed controller design \simulation
verilogsram
- FPGA开发板上的VerilogHDL编写的SRAM读写试验程序, 包括介绍文档, Verilog源码, 在Quartus II 8.1环境下测试通过-FPGA development board SRAM VerilogHDL prepared to read and write test procedures, including the descr iption document, Verilog source code, the Quartus II 8.1 environment te
EP1C3_12_5_RSV
- 基于ＦＰＧＡ的数字存储示波器，用ＶＨＤＬ实现的，压缩包里是Quartus工程。AD采样送进FPGA，存入SRAM后用DA在普通示波器上可以显示。-FPGA-based digital storage oscilloscope, using VHDL achieved compression is Quartus project bag. AD sample into FPGA, after SRAM into DA in ordinary oscilloscope can display.
PWM
- verilog pwm to control servo motor on quartus, with microprocessor generated from sopc and connected with sram-verilog pwm to control servo motor on quartus
SRAM
- 语言：VHDL 功能：利用VHDL编程，实现FPGA对SRAMIS61LV24516的读写操作。由于是针对IS61LV24516型号进行读写的，如果不是此型号的SRAM需要对程序进行时序修改。 仿真工具：modelsim 综合工具：quartus -Language: VHDL function: the use of VHDL programming, FPGA on SRAMIS61LV24516 read and write operations. Because it
SRAM
- Verilog 语言描述，SRAM的实验操作，Quartus中编译通过-Verilog language descr iption, SRAM experimental operation, Quartus compiled by
custom_sram_hw
- Quartus SOPC SRAM Component
quartus
- 用vhdl语言编写的sram的简易读写程序，适合初学者参考，-The VHDL language sram easy to read and write procedures, suitable for beginners reference
sram_uart_tx
- 将SRAM中的数据通过串口发送到电脑上。 软件：Quartus II 9.0 (32-Bit) 硬件：EP1C12-SRAM data is sent to the computer through the serial port. Software: Quartus II 9.0 (32-Bit) Hardware: EP1C12
SRAM
- 用Verilog实现8051sdam，并在Quartus和modelsim上完成测试和仿真，内含源代码和测试程序。-Using Verilog realize 8051sdam, and complete testing and simulation, including source code and test procedures in Quartus and modelsim.
HEX2MIF
- QUARTUS II SRAM/ROM初始化需要的HEX文件与Keil产生的HEX格式不同；该Modelsim程序，将Keil产生的Hex转换成，Quartus可以是识别的MIF格式；(The QUARTUS II SRAM/ROM initialization needs HEX files which are different from those generated by Keil. The Modelsim program converts Hex generated by Keil
sram_ctr
- SRAM VERILOG 实现FPGA控制SRAM的功能。测试可以使用。(SRAM verilog fpga vivado ise quartus.)