搜索资源列表
SQRT
- 用verilog代码编写的求整数平方根的FPGA工程。-Verilog code written request with the integer square root of the FPGA project.
uart-
- 通用异步通讯UART的工程文档，ISE打开工程，里面有VERILOG的源代码，可以编译通过-UART Universal Asynchronous communication engineering documents, ISE open the project, which has VERILOG source code can be compiled
t12
- quartus 9.0的工程，verilog编写，步进电机控制，可以调速和控制位置.可综合。-Quartus project files are included in RAR file. It s written in verilog HDL ,and the purpose is to control both the speed and position of Stepper motor。And project passed synthesis.
ram
- 利用verilog实现的双口RAM。文件包含工程文件，仿真文件，使用方便。-Using verilog implementation of dual-port RAM. File contains the project files, simulation files, easy to use.
ADSP2011Local
- pci9054芯片本地总线控制示例程序，可用于pci驱动和应用程序的测试。每隔一段时间产生一次中断，产生1，2，3等递增数据，配合pci9054驱动和应用程序完成数据传输 2.说明：文件夹内是Quartus 9.0的工程文件，使用Verilog语言。-pci9054 local bus control chip sample program can be used for pci driver and application testing. Generate an interrupt at r
decoder3to8
- 三线八线译码器，verilog语言编写，包括整个工程，作为入门的调试程序学习-Three-line eight-line decoder,verilog language,including the entire project,start the debugger as a learning
lcd_zifu
- 用LCD显示英文字符与数字的完整verilog程序工程。-LCD Display English characters and numbers, complete verilog program works.
water
- 一个verilog编写的流水灯例程，包含整个工程及下载文件-Written in a light water verilog routines, including the entire project and download the file
fifo
- 使用verilog实现FIFO，包含所有工程文件。-Verilog implementation using FIFO, includes all project files.
LED_CONCTROLER
- VERILOG语言实现的交通灯控制器,包括工程,源码,及说明文档,对学习很好,已经经过验证.-VERILOG language of the traffic light controller, including engineering, source code, and documentation, to learn well, has been verified.
error-detection-device
- 使用Verilog语言编程，在Quartus ii 上实现的误码检测装置，并通过单片机将误码结果显示在LCD上。本代码具有一定的工程实践价值。-Using the Verilog language programming, implemented on the Quartus ii error detection device, and the result of errors by the microcontroller on the LCD display. The code has som
usb_latest.tar
- USB 源码。Verilog实现的USB程序，用ISE打开工程文件即可-USB verilog code。-Verilog implementation USB program, open the project file with the ISE can be
ChanEst_ise11
- OFDM基于导频的MMSE信道估计的Verilog完整工程，可以和matlab配合使用，源自清华电子系成熟的工程和算法-Verilog Project for MMSE ChanEst of OFDM
fifo_verilog
- FIFO的verilog实现,内含PDF说明和已建好工程。-Implementation of FIFO using verilog
DDR_CTRL
- DDR Verilog 控制器，quartus 10.1工程。适用Altera Cyclone® III starter board-DDR control quatrus 10.1，Altera Cyclone® III starter board
FPGA_Project_Files
- 基于sdram的pci设计，包含整个工程，verilog编写-The design is base on sdram, contain a whole project ,using the verilog language.
dpram
- 包含整个工程，是用verilog来编写，实现双口ram的功能-Contains the entire project is to write Verilog to achieve the function of the dual-port ram
MEMCTRL
- 基于verilog的存储控制器芯片设计的工程。使用 Quartus II 4.0 以上版本打开设计工程文件。-Based on the works of the the verilog storage controller chip design. Use the Quartus II 4.0 or later to open the design engineering documents.
sincount
- 用verilog语言开发的，ise产生正弦波的工程文件-Ise generate the triangular wave file
paomadeng
- Verilog编写的跑马灯代码，该工程已经在Spartan-3E上下载成功。-Verilog prepared marquee code, the project has been in the Spartan-3E download success