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RS(Reed-Solomon)码是差错控制领域中一类重要的线性分组码，由于其出众的纠错能力，被广泛地应用于各种差错控制系统中，以满足对数据传输通道可靠性的要求。
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this the completedocumentation and code about reed solomon logic implemented on fpga in verilog.-this is the completedocumentation and code about reed solomon logic implemented on fpga in verilog.
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reed solomon encoder synthesis and simulation is done using verilog and working fine
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reed solomon encoder (255,239) verilog source code
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reed solomon (204,188). in verilog.
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reed solomon encoder in verilog-reed solomon encoder in verilog
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reed solomon encoder verilog code.-reed solomon encoder verilog code.
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reed solomon encoder used in DVB verilog code.
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Reed Solomon decoder implemented in VHDL/Verilog. Includes ASM s
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Reed Solomon Decoder written in Verilog Libero core generator.-Reed Solomon Decoder written in Verilog Libero core generator.
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Reed Solomon MATLAB Code Verilog Code RSCODE -Reed Solomon MATLAB Code Verilog Code RSCODE RSRS
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Syndrome calculator basic unit for reed solomon decoder in verilog language
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ReedSolomon RS(15,11) Verilog 编码和解码测试程序 编码有两种实现方式 串行和并行方式(ReedSolomon RS(15,11) Verilog Encoder&Decoder)
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