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FFT变换的IP核的源代码 VHDL~
- FFT变换的IP核的源代码 VHDL~-FFT IP core of the source code for VHDL ~
fft
- fft代码,采用蝶形算法,包括C,matlab和verilog代码-fft code, using butterfly algorithm, including C, matlab and Verilog code
dft
- verilog语言实在点变换DFT源代码，可以配合软核或者其他CPU进行综合FFT变换，也可以单独使用生成module！-verilog language is point FFT transform source code, can tie in with the soft-core CPU, or other integrated FFT transform, it can be used to generate module!
FFT
- Verilog实现的FFT模块，供OFDM调制系统使用，可供大家参考学习-Verilog implementation FFT module for the OFDM modulation system used for your reference study
16Point-FFT
- 16点FFT VHDL源程序，The xFFT16 fast Fourier transform (FFT) Core computes a 16-point complex FFT. The input data is a vector of 16 complex values represented as 16-bit 2’s complement numbers – 16-bits for each of the real and imaginary component of a
signalprocess_fft_VHDL
- 一篇用VHDL实现快速傅立叶变换的论文，包括原理分析和代码实现，印度圣雄甘地大学M.A.学院提供，同时包含使用手册，做FFT很好的-VHDL with a fast Fourier transform papers, including the principle of analysis and code, India Mahatma Gandhi Institute of the University of MA, at the same time contains the user manu
DSP_FPGA
- help on source code for fft in vhdl
FFT1024
- System generator code for fft implementation. Pls enjoy it
fft2
- 512点8位基2fft程序。基于 vhdl/verilog。已仿真布线通过。-512 points, eight base 2fft program. Based on vhdl/verilog. Simulation layout has been adopted.
fftandifft
- this is a code in VHDL for FFt and its inverse. also the programs are given in matlab
Df3
- fpgafft 用 实现dsp 的fft算法 其中有几个文档文件和用vhdl写的1024点 代码-fpgafft dsp with the fft algorithm to achieve a number of documents including documents and written with a vhdl code for 1024 points
64R4SDFpoint_FFT
- 该工程实现了一个64点FFT，verilog编写，采用R4SDF结构，通过Modelsim功能仿真，压缩包里有rtl代码，dc脚本，输出报告。-The project implements a 64-point FFT, verilog compiled by R4SDF structure, through the Modelsim functional simulation, compression bag with rtl code, dc scr ipt, the output repo
64pointFFTR2MDC
- 该工程实现了一个64点DIF FFT，verilog编写，采用R2MDC结构，通过Modelsim功能仿真，压缩包里有rtl代码，dc脚本，输出报告。-The project implements a 64-point DIF FFT, verilog compiled by R2MDC structure, through the Modelsim functional simulation, compression bag with rtl code, dc scr ipt, the out
FFt
- 基2FFT蝶形运算器，代码有仿真用数据。主代码用于仿真，碟形运算和复数乘法元件化-Based 2FFT butterfly, code with simulation data used. Master code for simulation, dish components of computing and complex multiplication
fft
- vhdl code and verilog code for an 128 point fft processor which has to be executed in xlinx software as needed for course project
systemCFFT_24_16
- c program & vhdl code for fft-c program & vhdl code for fft....
fft
- vhdl code for fourier transform
vhdl-code-for-FFT-32-point
- vhdl code for FFT 32 point
vhdl
- code for fft non synthesisable in xilinx ise
SDF-DIF-FFT-pipelined
- vhdl code for pipelined single delay feedback radix 2 square FFT