搜索资源列表
nios_ck
- VHDL的小例子,DE2开发板的入门例子,一个基于SOPC的串口的例子。- VHDL example, the entry of the DE2 development board example of a SOPC-based serial port examples.
DE2_lcd_clk
- 用VHDL写的在DE2开发板上的LCD实现的秒表程序-DE2 development board LCD stopwatch program written in VHDL
traffic-lights
- vhdl用状态机方式实现交通灯功能,有原理图仿真结果···基于de2板验证-vhdl state machine approach to the traffic lights function and schematic simulation results verify de2 board
uart
- verilog VHDL实现的DE2 uart-Verilog VHDL the uart of the DE2
fsk_completed
- FPGA为设计载体,VHDL 为设计输入,完成2FSK调制器的实现,下载到DE2平台通过D/A转换模块于示波器上实现-2FSK based on Fpga
Vmidd-filtterH
- 用vhdl语言实现的中中值滤波,硬件需要DE2板 -Use the vhdl language in median filtering, the hardware needs DE2 board
TetrisV2.0
- VHDL和verilog语言,在de2板上实现俄罗斯方块 ,VGA显示,改进版-VHDL and verilog language, Tetris, de2 board, VGA display, an improved version of
ir
- 在DE2-115板子上的IR接受器的控制器(给予VHDL语言)!已在板子上调试通过,可以直接使用!-DE2-115 board IR receiver controller (given VHDL language)! Through debugging on the board, can be used directly!
wannianli
- 数字万年历,可显示年月日,时分,具有闰年功能。VHDL语言编写,利用DE2平台实现。-Digital calendar, date, time, with a leap year. VHDL language using DE2 platform.
filter
- 在DE2-70上运行的程序,程序是一个低通滤波器,滤波器用VHDL语言实现,已经过验证,可以放心使用。-DE2-70 to run the program, the program is a low-pass filter, the filter using VHDL, has been verified and is safe to use.
bcd7seg
- program vhdl bcd to 7segment altera de2
DM9000A_IF
- DE2平台上对DM9000A进行管脚配置的vhdl程序。-DE2 platform on the pin configuration of the VHDL program on DM9000A
uart_lcd
- 基于FPGA的UART通信,并用LCD(1602)显示通讯状态和通讯的数据。通过在ALTERA公司生产的DE2-115开发板上运行,证明此程序稳定可靠。时钟为50MHz,语言为VHDL,状态机。-FPGA-based UART communication, and LCD (1602) show the communication status and data communications. DE2-115 development board by ALTERA Company product
VHDL_CAIDENG
- 基于altera de2的流水灯循环程序,使用VHDL编写。-Based on a de2 Lantern cycle, use of VHDL
xiyijikongzhi
- 基于altera DE2的洗衣机控制器设计。使用VHDL编写。-Based on the the Altera DE2 washing machine controller design. The use of VHDL.
weideng
- 基于altera DE2的汽车尾灯控制设计。使用VHDL编写。-Altera DE2-based the taillights control design. The use of VHDL.
telphone
- 基于altera de2的电话计费器设计,通过数码管显示时间和费用。vhdl编写-Meter design based on the altera de2 the phone, through the digital display time and costs. vhdl prepared
DE2_SD_Card_Audio
- DE2 SD player that uses VHDL and NIOS II to program the DE2 ALtera FPGA board
color
- DE2板上用VHDL写的彩条发生器,ping口已连好,直接可以运行-DE2 board write VHDL color bar generator, ping mouth has been even better, you can directly run
DE2_115_SD_CARD
- DE2_115开发板给出的基于NIOS的SD卡的实例-DE2-115 nios ii s vhdl