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二进制串行-1计数器
- 大学计算机数字逻辑实验作业 用Multisim仿真软件编写 计数器 用双D触发器74Ls74构成四位二进制串行计数器 二分频计数原理-University computer digital logic operations using Multisim experimental simulation software used to prepare counter-D Trigger 74Ls74 constitute four serial binary frequency counter t
VERIOGCLK
- 作clk_in 的二分频clk_out，要求输出与上例的输出正好反相。编写测试模块， 给出仿真波形。-clk_in for the two-frequency clk_out, output and demand were on the output is reverse. Test preparation module, simulation waveforms are given.
coding
- 数字通信系统设计上机实验题，二分频，全加器，乘法器，四选一选择器-Digital communication system design on the experimental questions, divide, full adders, multipliers, four elected a selector
biaozhun100HZfangbo
- 100Hz方波，原来用D触发二分频成上下可有驱动桥式PWM整流电源用的。-100Hz square wave, the original D flip two divided into upper and lower may have driven Bridge PWM rectifier power use.
compare
- 八位字节比较器，四选一多路选择器，二分频电路-Octet comparator 4 election more than one way selector, the second divider circuit
BP_Dichotom_two
- 步进频连续波探地雷达快速成像算法研究，BP算法 采用二分法求位置(Research on fast imaging algorithm of stepped frequency CW ground penetrating radar (BP).)