基于赛灵思的spartan-3e开发板的语音智能计算器的设计，开发语言verilog，开发软件ISE，可以根据ucf文件理清引脚关系。应用者需要对开发板和fpga设计有一定的了解！-Development board based on Xilinx spartan-3e voice smart calculator design, development languages ​ ​ Verilog, developing software ISE, according to

实现两个数的运算，每个数的位数至少可以八位(The operation of two numbers is achieved. The number of bits per digit can be at least eight bits)

利用单片机设计的计算器，用键盘输入，由单片机计算结果，计算过程由LCD液晶显示(The calculator which is designed by single chip microcomputer is input by keyboard. The result is calculated by single chip computer. The calculation process is displayed by LCD LCD.)

本设计是以STC89C51单片机为核心的计算器模拟系统设计,输入采用4×4矩阵键盘再加上4个独立按键,可以进行加、减、乘、除7位带符号数字运算,同时支持括号的嵌套使用级浮点数的运算,并在LCD1602上显示操作过程。(This design is a calculator simulation system design with STC89C51 MCU as the core. Input 4 * 4 matrix keyboard plus 4 independent keys can a