32位高性能浮点乘法器芯片设计研究.pdf-32-bit high-performance floating-point multiplier chip design research. Pdf

《基于FPGA的单精度浮点数乘法器设计》详细介绍了按照IEEE754标准在FPGA上实现单精度浮点加减乘除的方法(The design of single precision floating point multiplier based on FPGA introduces in detail the way of realizing single precision floating point addition, subtraction and multiplication and div