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plj
- 本程序为VHDL编写的频率计，测频范围从0.1Hz到1G-VHDL procedures for the preparation of the frequency meter, measuring frequency range from 0.1Hz to 1G
Digital_system_design_example
- 数字系统设计实例.pdf,VHDL语言实现，7.1 半整数分频器的设计7.2 音乐发生器7.3 2FSK/2PSK信号产生器7.4 实用多功能电子表7.5 交通灯控制器 7.6 数字频率计.值得一看。-digital system design examples. Pdf, VHDL, 7.1-integer divider design Music Generator 7.2 7.3 2FSK/2PSK Signal Generator 7.4 Practical multi-functi
FPGA_27eg
- FPGA很有价值的27实例.rar 包括 LED控制VHDL程序与仿真 2004.8修改.doc； LED控制VHDL程序与仿真； LCD控制VHDL程序与仿真 2004.8修改； LCD控制VHDL程序与仿真； ADC0809 VHDL控制程序； TLC5510 VHDL控制程序； DAC0832 接口电路程序； TLC7524接口电路程序； URAT VHDL程序与仿真； ASK调制与解调VHDL程序及仿真； FSK调制与解调VHDL程序及仿真
cepinji
- 用VHDL 语言描述频率计的设计，其开发均在FPGA中-using VHDL descr iption of the design frequency, the development is in FPGA
shiyan6
- 一个8位的十进制频率计数器,功能经过测试.-An 8-bit decimal frequency counter, function tested.
EDAkechengsheji
- 实现6位频率计，防止数据溢出，并对频率进行三分频-Frequency to achieve 6 to prevent data overflow, and one-third of the frequency band
EDA
- 以前学EDA的时候做过的四个小程序，分别是24/12小时制数字钟、数字频率计、乐曲播放电路、多人智力竞赛抢答器-EDA previously done when the four small procedures are 24/12 hour digital clock, digital frequency meter, circuit music players and many more devices quiz Answer
digitalfrequencymeter
- 介绍了基于VHDL开发的数字频率计 从方案到结果-digital frequency meter
cepin
- 基于等精度测频法的频率计测频模块，用VHDL 编写，在QUARTUS里面编译成功的-Such as precision frequency measurement method based on the frequency meter measuring frequency module, using VHDL written inside the compilation of success in the QUARTUS
counter
- 频率计，自动记录信号波形，宽频，四位，自动换挡-Frequency counter, automatic recording signal waveform, broadband, 4, auto-shift
Project_of_DDS
- 基于VHDL硬件描述语言的数字频率计设计-Project_of_DDS
frequencycounter
- 一个简单大家容易看的懂的频率计设计程序，可以实现自动换挡功能。-A simple and easy to see to understand all of the frequency counter design program that can automatically shift feature.
counter_bcd7
- bcd十进制计数器，用于频率计设计的计数器单元，输出zeros用于选通量程使用！-bcd decimal counter, the counter for frequency counter design unit, the output zeros for the use of strobe range!
aa
- 数字频率计VHDL程序-Digital frequency meter VHDL program
pinlvji
- 基于VHDL的数字频率计的设计-VHDL-based design of digital frequency meter
FBASSED_FLEX1L
- 一种基于FLEX10K的频率计设计，使用分层设计，顶层文件为为GDF，其余为VHDL代码，有一定的参考价值。 已通过测试。 -Based FLEX10K frequency meter design, using a layered design, top-level document GDF rest VHDL code, there is a certain reference value. Has passed the test.
COUNT
- vhdl编写的数字频率计，可以实现对输入波的频率计数-vhdl prepared by of the digital frequency meter
频率计数码管显示_QII视频讲解
- 频率计数码管显示_QII视频讲解 用VHDL语言写的频率计(Frequency meter, digital display, _QII video explanation, written in VHDL language frequency meter)
频率计
- quartusii 和vhdl语言利用四位频率计设计，(Four bit frequency meter design)
plj
- 使用vhdl语言原件例化设计数字频率计，并用6位7段数码管计数。模块包括：十进制计数器，6位10进制计数器，Reg24 锁存器、Fp 分频器、Ctrl 频率控制器、Disp 动态显示。(The digital frequency meter is designed by using VHDL language as an example and counted by 6-bit 7-segment digital tube. Modules include: decimal counter, 6