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ALU
- alu设计,实现三十二位计算，包括加法和减法，以及与，或，异或等-design of alu，alu design, implement 32, including both the addition and subtraction, as well as AND, OR, XOR, etc
M_design
- 设计一个简单的8比特ALU和一个简单的存储器，是用VerilogHDL实现的，这是个题目及其解析-Design of a simple 8-bit ALU and a simple memory, is used VerilogHDL realized, this is a subject and its analytic
ALU_design
- 设计一个简单的8比特ALU的源代码，是用VerilogHDL实现的-Design of a simple 8-bit ALU s source code is achieved using VerilogHDL
ALU---M_design
- 设计一个简单存储器的源代码，是用VerilogHDL实现的-Design of a simple memory of the source code, is used to achieve VerilogHDL
ALU
- ALU加法器的设计，实现带进位的加法运算！-ALU adder design, the realization of the adder into the bit computing!
lab2
- 数字部件设计编程，verylog编程，计算机ALU部件编程-Digital Component Design Programming, verylog programming, computer programming ALU components
organization
- organization project design ALU
ALU_32
- 32 bit ALU design,LU Operations: This input specifies the ALU operation to be used during the acquisition process. The ALU operations are divided into logical operations and two classes of arithmetic operations. The two classes of arithmetic operatio
8-alu
- 8-bit alu design...it has arithematic and shift operation-8-bit alu design...it has arithematic and shift operation....
32Bitaludesign
- Design of simple 32 bit alu for SPARTAN 3 paltform
cpu
- 16位实验CPU设计——设计16位的ALU，实现9种运算：逻辑运算（与、或、非、异或）4种、算术运算（加、减、自加、自减）4种以及传送操作1种；-16 Experimental CPU design
lib7
- ALU运算器的设计。将算术逻辑单元与寄存器组集成-ALU arithmetic unit design. The arithmetic logic unit and the register set of integrated
ALU
- 哈工大计算机学院2014年夏季学期设计与实践 实验一 ALU算术逻辑单元的实现-ALU design from hit computer science
ALU
- Verilog中的ALU设计，具备ALU的功能，十分详细。-The ALU Verilog design, with ALU functions, very detailed.
ALUB
- 16 bits conherrent and sequential ALU design with ram and ssd
ALUYEDEK
- alu circuit design for vlsi and 4 bits alu
杭电计算机组成原理多功能ALU设计实验3
- 计算机组成原理实验三 多功能ALU设计实验(Computer composition experiment three Design experiment of multifunction ALU)