搜索资源列表
311-45469-PIC18F8723
- Ideal for large low power (nanoWatt) and connectivity applications that benefit from the availability of four serial ports: double synchronous serial ports (I² C™ and SPI™ ) and double asynchronous (LIN capable) serial ports. Large amou
spi
- spi接口的vhdl实现，所用器件和ip为xilinx的
Bspii_masttera
- 一种基于CPLD/FPGA的的SPI控制的IP核的实现spi -Based on CPLD/FPGA IP core SPI control realize spi
spi_master_test
- SIMPLE SPI MASTER IP CORE FORM OPENCORES
CH395
- CH395 是以太网协议栈管理芯片，用于单片机系统进行以太网通讯。 CH395 芯片自带10/100M 以太网介质传输层（MAC）和物理层(PHY)，完全兼容IEEE802.3 10/100M 协议，内置了PPPOE、IP、DHCP、ARP、ICMP、IGMP、UDP、TCP 等以太网协议栈固件。 单片机系统可以方便的通过CH395 芯片进行网络通讯。 CH395 支持三种通讯接口：8 位并口、SPI 接口或者异步串口，单片机/DSP/MCU/MPU 等控制 器可以通过上述任
微软官网LSP
- // Descr iption: // // This sample illustrates how to develop a layered service provider that is // capable of counting all bytes transmitted through an IP socket. The application // reports when sockets are created and reports how many