利用最新的UVM验证方法学搭建完整的ASIC的验证平台。-UVM and svtb for ASIC verification

axi uvm vip, verification model -axi system verilog

a practical guide to adopting the universal verification methodology examples The universal verification Methodlology is a complete mothodology that codifies the best practices for efficient and exhaustive verification.

张强书所带代码和PDF,代码验证可用,好好学习(Zhang Qiangshu's code and PDF)