搜索资源列表
BGA1
- 本应用指南针对 FT256 1 mm BGA 封装的 Spartan™ -3E FPGA，讨论了低成本、四至六层、 大批量印刷电路板 (PCB) 的布局问题，同时探讨高速信号和信号完整性 (SI) 因素对低层数 PCB 布局的影响。-Application Guide for the FT256 1 mm BGA package, Spartan ™-3E FPGA, the discussion of the low-cost, four to six, high-
XilinxFPGA
- 在Xilinx的FPGA开发板上运行第一个FPGA程序-In the Xilinx FPGA development board to run the first program a FPGA
SlaveSerialFPGA
- salve serial 配置XILINX FPGA源代码-slave serial config xilinx fpga
fpga_memory_rev_1_0
- Various memories for Xilinx and Altera FPGA devices. Single-port and Dual-port versions with various numbers of read and write ports. Bundle also includes read-first and write-first varieties with sync and async clocks. All memory compo
eetop[1].cn_ise_book
- Xilinx ISE 9.x fpga&cpld设计指南 光盘附带内容
jj
- 本题设计一个数字存储示波器，以Xilinx公司20万门FPGA芯片为核心，辅以必要的外围电路（包括信号调理、采样保持、内部触发、A/D转换、D/A转换和I/O模块），利用VHDL语言编程，实现了任意波形的单次触发、连续触发和存储回放功能，并按要求进行了垂直灵敏度和扫描速度的挡位设置。信号采集时，将外部输入信号经信号调理模块调节到A/D电路输入范围，经A/D转换后送入FPGA内部的双口RAM进行高速缓存，并将结果通过D/A转换送给通用示波器进行显示，完成了对中、低频信号的实时采样和高频信号的等效采
Virtex_Analog_to_Digital_Converter
- adc转换程序，在Xilinx的FPGA上实现-adc conversion program, implemented on the Xilinx FPGA
gps
- Implement the GPS module time detection function via verilog language.-gps fuction module implemented in xilinx FPGA
picoblaze_led_assamble
- 该程序为一个基于xilinx FPGA的软核picoblaze的流水灯汇编简单示例程序，对于第一次了解FPGA嵌入式的程序员很有启发意义-The program is a compilation of a simple sample program based on xilinx FPGA soft the nuclear picoblaze the water light, and very instructive for the first time the FPGA embedded pr
xds28ea_srci
- xilinx fpga 实现温度传感器ds28eea00的控制接口 ，经测试 -xilinx fpga temperature the sensor ds28eea00 control interface has been tested
Xddr2i
- 基于Xilinx fpga的dddr2 控制器设计方法 -Xilinx fpga dddr2 controller design method
XFPGA_DDR_SDRi
- 基于Xilinx FPGA的DDRSDRAM的Verilogg控制代码，使用的FPGA为Virtex. -Based on Xilinx FPGA' s DDRSDRAM Verilogg control code, the use of FPGA as the Virtex.
Xedk_for_busyI
- XILINX 出品 EDK快速学习资料。 EDK在 Xilinx FPGA上构架一个CPU软核， 以提高整个系统的灵活性，和可扩展性。 -XILINX produced the EDK rapid learning materials. EDK Xilinx FPGA architecture of a CPU soft core in order to improve overall system flexibility, and scalability.
Xilinx-Downloader
- 这是一个Xilinx并口下载线的图纸，可下载Xilinx的CPLD\FPGA,本人试制成功过，并在ISE12.1下载验证。-This is the drawing of a Xilinx parallel port download cable, downloadable Xilinx CPLD \ FPGA, I succeeded in the trial, and in ISE12.1 Download verification.
Plasma_Cpu_r10.tar
- Plasma CPU: VGA coded with C and VHDL in Xilinx FPGA
runningclock
- verilog HDL实现跑表设计，开发环境为xilinx，fpga芯片为spartan系列。-verilog HDL the Stopwatch design and development environment for the spartan xilinx, fpga chip series.
digitalclock_demo
- 该程序适用于xilinx公司的FPGA开发板，spartan3E系列250型号 通过verilog编程实现数字钟的功能，下板子验证可用！-This procedure applies to xilinx FPGA development board Series 250 Model spartan3E digital clock verilog programming under the board to verify available!
xc2s_ibis
- xilinx FPGA IBIS模型,系统集成FPGA 分析必备工具-xilinx FPGA IBIS MODEL
xc3san_bsdl
- xilinx FPGA IBIS模型,系统集成FPGA 分析必备工具-xilinx FPGA IBIS model is an indispensable tool for system integration FPGA analysis
spartan3an_ibis
- xilinx FPGA IBIS模型,系统集成FPGA 分析必备工具-xilinx FPGA IBIS model is an indispensable tool for system integration FPGA analysis