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ccmulVHDL
- vhdl语言编写的复数乘法运算器原代码，采用定点运算，并将复数乘法转为实数运算。-VHDL language in the plural multiplication with the original code using fixed-point computation. will the plural multiplication to real operations.
desingofmultiply
- 设计定点寄存器的好书，希望大家喜欢，对哦多交流-Design of fixed-point register books, I hope you like it, oh, more exchanges of
multiplier8x8
- 8位定点乘法器，支持有符号数/无符号数运算。采用4-2压缩树结构，并提供testbench。-It is an 8-bit fixed-point multiplier, supporting signed/unsigned operations. Wallance tree structure with 4-2 compression. Provides testbench.
fixed-point-sqrt_latest.tar
- Code source d une solution pour calculer la racine carre en VHDL