搜索资源列表
ptc
- PWM/TIMER/COUNTER VHDL IP core-PWM / TIMER / COUNTER VHDL IP core
gh_timer_8254_081608
- Timer 8254 Verilog source code
Timer
- 麦克风阵列的TLS自适应波束形成算法仿真，麦克间距和输入信号带宽可调，通过调整参数达到需要的输出-TLS microphone array adaptive beamforming algorithm simulation, Mike spacing and input signal bandwidth is adjustable by adjusting the parameters to achieve the required output
jishiqi
- 24小时计时器，本计时器能够实现时分秒的精确计时(测试可用)-24-hour timer, the timer to achieve the precise time when minutes and seconds (test available)
stld_appl
- vhdl for timer done in vhdl and whole data is given
shuzimiaobiaoVHDL
- 数字秒表的VHDL语言实现，由于系统定时器8253每秒中断18.2次,利用INT 1AH/00H取得中断次数(DX),得到54.945ms的定时单位。 -Digital stopwatch the VHDL language, because the system timer interrupt 18.2 times per second, 8253, made use of INT 1AH/00H interrupt number (DX), by 54.945ms timing uni
dip
- 计时器与出租车计价器源代码，编写语言为VHDL-Timer with the taxi meter source code, written language VHDL
VVHDL_32bit_tH
- VHDL写的32位计数，两个四位共阳数码管输出串口输出+数码码管显示的计时器程序每次停止后串口输出。，已通过测试。 -VHDL written 32 count, two four sun digital serial output tube output serial output the+ digital code to display the timer program each stop. , Has been tested.
VHDL
- 一些简单基本的vhdl代码源程序，包扩三八译码器，数据选择器，30s倒计时器等-Some simple basic VHDL source code procedures, bag expanding 38 decoder, data selector, 30 s down timer, etc
timer
- 定时器，VHDL 实现，希望对大家有用，共同学习-the timer with vhdl
eclock
- 使用vhdl语言实现一个集计时器，闹钟，整点报时为一体的电子钟-Electronic clock VHDL language as one of a set timer, alarm clock, the whole point timekeeping
Timer
- Nexys 3 seven segment display module written in VHDL
shuzizhong
- 在ise平台上用VHDL语言实现数字钟，具有计时和重置时间功能、整点报时功能、闹钟功能，每个功能都使用元件例化的方法，通过顶层文件将每一个模块联系在一起。-On ise platform using VHDL digital clock with timer and reset the time function, the whole point timekeeping function, alarm clock function, each function using the compone