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ttraafficLighr
- <p>交通灯状态机的实现，用verilog HDL编程与开发，Xillinx ISE 6仿真，在实际电路中的到验证． 已通过测试。</p> -<p> The implementation of the traffic light state machine, using verilog HDL programming and development, Xillinx ISE 6 simulation, to verify the actual circui
fVerrilog_Devr
- 朋友，我是Jawen.看到先前上载的一套CPLD开发板的VHDL源码挺受欢迎的，现在就将她的Verilog源码也一并贡献给大家：8位优先编码器，乘法器，多路选择器，二进制转BBCD码，加法器，减法器，简简单易懂状态机，四位比较器，7段数码管，i2c总线，lcd液晶LCD显示出来，拨码开关，串口，蜂鸣器，矩阵键盘，跑马灯，交通灯，数字时钟 可直接使用。 -Friends, I Jawen. See previous upload a CPLD Development Board VHDL so
jiaotongdeng
- 基于verilog的交通灯控制器设计 很实用的噢-Controller design based on the the verilog traffic lights
Traffic_Control
- 武汉理工大学电子课程设计verilog交通灯程序-Wuhan university of science and technology electronic curriculum design verilog traffic lights program
jiaotongdeng
- 用verilog HDL语言编写的交通灯源码，比较简单，-Verilog HDL language traffic light source, is relatively simple,
jtd
- 基于fpga的交通灯设计 verilog代码-Traffic lights based on fpga design verilog code
traffic_yangyang_20104878
- 交通灯控制系统，基于Verilog HDL-Traffic light control system, based on Verilog HDL
EDA--jiaotongdeng
- 基于EDA的交通灯设计 verilog语言-Based on EDA design of traffic lights verilog language
traffic_simple
- 基于Verilog的简易交通灯控制。//主干道绿灯亮30s，最后5秒绿灯灭黄灯亮，30s过后红灯亮起，倒数20s后绿灯亮30s，如此重复 //支干道红灯亮30s，后绿灯亮，支干道绿灯倒数20s，最后5s绿灯灭黄灯亮，20s倒数完后换红灯亮30s，如此重复-Verilog-based simple traffic light control. // Main road green light 30s, the last five seconds off the yellow light gre
fpga-Verilog_traffic
- 使用verilog语言描述交通灯的功能，已通过实验验证，可直接使用-Using Verilog language to describe the function of traffic lights, has been verified by experiments, can be directly used