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pll_verilog_code
- 这是一段pll verilog代码，是本人转载！-This is a period of pll verilog code, yes I reprint!
Pro_19
- Fpga,DDS,PLL,rom(正弦波)(f<13MHz,需要滤波)(Verilog)-Fpga, DDS, PLL, rom
PLL
- PLL锁相环相关Verilog代码，以及时序的操作，相关文件的载入和仿真环境的建立。-The PLL related Verilog code, and the establishment of the timing of the operation, the relevant documents loading and simulation environment.
pll
- this is pll for verilog