xilinx VERILOG fpga BASYS2 音乐单次播放实现-xilinx VERILOG fpga BASYS2 music single player to achieve

用Verilog HDL编写的光敏传感器AD/DA程序，AD结果显示在LCD上，DA结果控制LED的亮度，相关软件：ISE Design suit，硬件：xilinx FPGA开发板-Verilog HDL prepared with light sensors AD/DA program, AD results are displayed on LCD, DA of controlling LED brightness, software: ISE Design suit, hardware:

A classic FIR filter implemented using Verilog HDL on the Xilinx software-A classic FIR filter implemented using Verilog HDL on the Xilinx software

基于XIlinx ISE，用Verilog语言实现3分频电路，适合初学者-Based XIlinx ISE, Verilog language using the frequency dividing circuit 3, suitable for beginners

Verilog implementation of an SPI slave interface. Intially targetted for Atlys devkit (Xilinx Spartan-6) controlled by TotalPhase Cheetah USB/SPI adapter