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FppaasslockP
- 一种基于FPGA的电子密码锁的设计,内有Verrilog HDL源码与各仿真图像 -A FPGA-based design of electronic locks, internal Verrilog HDL source with simulated images
uuarrt_verilla
- uart串行口,用Verrilog开发的.供大家参考 -reference uart serial port, with Verrilog developed.
PSouurceFiileS
- PS2键盘实验Verrilog HDL代码 -The PS2 keyboard experiments Verrilog HDL code