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SDH.rar
- 他是一个SDH上行代码，有八个模块组成的，能够传输以太网的数据 ,He is an SDH uplink code, there is composed of eight modules, Ethernet can transmit data
FPGA-DM9000A
- FPGA控制DM9000A进行以太网数据收发的Verilog实现-FPGA control DM9000A for Verilog realization of Ethernet data sent and received
ethernet_controller
- 以太网控制器MAC的verilog代码，已经过验证，可以用。-Ethernet Controller
intit
- 初始化网络芯片，我负责的是MAC的初始化和PHY初始化。可以试着在此基础上编写以太网。-Initialize the network chip, I am responsible for the MAC and PHY initialization initialization. Can try to write on this basis Ethernet.
ethernet-mac--VHDL
- 简易以太网测试仪,VHDL语言的，非常实用，有需要的可以看下-Simple Ethernet tester, VHDL language, very practical, need look
greth
- This driver supports GRETH 10/100 and GRETH 10/100/1G Ethernet MACs available in the GRLIB VHDL IP core library.
9_ethernet_1g_100M
- 基于Xilinx的Artix7实现千兆以太网的RGMII接口通信(RGMII interface communication for Gigabit Ethernet based on Xilinx Artix7)